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HM6288

Hitachi Semiconductor
Part Number HM6288
Manufacturer Hitachi Semiconductor
Description 16384-word x 4-bit High Speed CMOS Static RAM
Published May 25, 2014
Detailed Description HM6288 Series 16384-word × 4-bit High Speed CMOS Static RAM Description The Hitachi HM6288 is a high speed 64k static R...
Datasheet PDF File HM6288 PDF File

HM6288
HM6288


Overview
HM6288 Series 16384-word × 4-bit High Speed CMOS Static RAM Description The Hitachi HM6288 is a high speed 64k static RAM organized as 16-kword × 4-bit.
It realizes high speed access time (25/35 ns) and low power consumption, using CMOS process technology.
It is most advantageous for the field where high speed and high density memory is required, such as cache memory for mainframes or 32-bit MPUs.
The HM6288, packaged in a 300-mil plastic DIP and SOJ, is available for high density mounting.
A low power version retains data with battery backup.
Features • Single 5 V supply arid high density plastic package • High speed: fast access time 25/35 ns (max) • Low power dissipation: Active mode 300 mW (typ) Standby mode 100 µW (typ) • Completely static memory No clock or timing strobe required • Equal access and cycle times.
• Directly TTL compatible all inputs and outputs http://www.
Datasheet4U.
com HM6288 Series Ordering lnformation Type No.
HM6288P-25 HM6288P-35 HM6288LP-25 HM6288LP-35 HM6288JP25 HM6288JP-35 HM6288LJP-25 HM6288LJP-35 Access Time 25 ns 35 ns 25 ns 35 ns 25 ns 35 ns 25 ns 35 ns 300-mil, 24-pin SOJ (CP-24D) Package 300-mil, 22-pin plastic DIP (DP-22NB) Pin Arrangement HM6288P Series A0 A1 A2 A3 A4 A5 A6 A7 A8 CS VSS 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 VCC A13 A12 A11 A10 A9 I/O1 I/O2 I/O3 I/O4 WE A0 A1 A2 A3 A4 A5 A6 A7 A8 CS NC VSS HM6288JP Series 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A13 A12 A11 A10 A9 NC I/O1 I/O2 I/O3 I/O4 WE (Top view) (Top view) Pin Description Pin Name A0–A13 I/O1–I/O4 CS WE VCC VSS Function Address lnput/output Chip select Write enable Power supply Ground HM6288 Series Block Diagram A0 A1 A2 A3 A4 A5 A6 I/O1 I/O2 I/O3 I/O4 Input data control A7 CS WE Row decoder Memory array 128 rows 512 columns VCC VSS Column I/O Column decoder A13 Truth Table CS H L L WE × H L Mode Standby Read Write VCC Current I SB , I SB1 I CC I CC I/O Pin High-Z Dout Din Ref.
Cycle — Read cycle 1,...



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