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74HC165

Part Number	74HC165
Manufacturer	NXP
Description	8-bit parallel-in/serial out shift register
Published	Oct 7, 2015
Detailed Description	74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev. 03 — 14 March 2008 Product data sheet 1. General de...
Datasheet	74HC165 PDF File

Overview

74HC165; 74HCT165 8-bit parallel-in/serial out shift register Rev.
03 — 14 March 2008 Product data sheet 1.
General description The 74HC165; 74HCT165 are high-speed Si-gate CMOS devices that comply with JEDEC standard no.
7A.
They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC165; 74HCT165 are 8-bit parallel-load or serial-in shift registers with complementary serial outputs (Q7 and Q7) available from the last stage.
When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously.
When PL is HIGH, data enters the register serially at the DS input and shifts one place to the right (Q0 → Q1 → Q2, etc.
) with each positive-going clock transition.
This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage.
The clock input is a gated-OR structure which allows one input to be used as an active LOW clock enable (CE) input.
The pin assignment for the CP...

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