74AHC138-Q100;
74AHCT138-Q100
3-to-8 line decoder/demultiplexer; inverting
Rev. 3 — 10 September 2020
Product data sheet
1. General description
The 74AHC138-Q100; 74AHCT138-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.
The 74AHC138-Q100; 74A...
