Unit. ADP5020 Datasheet

ADP5020 Datasheet PDF

Part ADP5020
Description Power Management Unit
Feature www.DataSheet4U.com Power Management Unit for Imaging Modules ADP5020 TYPICAL APPLICATIONS CIRCUIT .
Manufacture Analog Devices
Datasheet
Download ADP5020 Datasheet





ADP5020
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FEATURES
Input voltage range: 2.4 V to 5.5 V
Low standby current: 1 μA
Switching frequency: 3 MHz
I2C interface
Synchronous Buck 1 regulator: 600 mA
Synchronous Buck 2 regulator: 250 mA
Low dropout regulator (LDO): 150 mA
Internal compensation
Internal soft start
Thermal shutdown
20-lead 4 mm × 4 mm LFCSP
APPLICATIONS
Digital cameras, handsets
Mobile TVs
GENERAL DESCRIPTION
The ADP5020 provides a highly integrated power solution that
includes all of the power circuits necessary for a digital imaging
module. It comprises two step-down dc-to-dc converters, one
LDO, and a power sequence controller. All dc-to-dc converters
integrate power pMOSFETs and nMOSFETs, making the system
simpler and more compact and reducing the cost. The ADP5020
has digitally programmed output voltages and buck converters
that can source up to 600 mA. A fixed frequency operation of
3 MHz enables the use of tiny inductors and capacitors. The buck
converters use a voltage mode, constant-frequency PWM control
scheme, and the synchronous rectification is implemented to
reduce the power loss. The Buck 1 regulator operates at up to
93% efficiency.
Power Management Unit
for Imaging Modules
ADP5020
TYPICAL APPLICATIONS CIRCUIT
VIN
2.4V TO 5.5V
10µF
VDD_IO
1µF
1.7V TO 3.6V
10k10k
0.1µF
VDD1
SW1
VDD2
VOUT1
VOUT1
VDD3
PGND1
ADP5020
VDDA
SW2
VOUT2
VDD_IO
PGND2
SDA
VOUT3
2.2µH
VOUT1
2.5V TO 3.7V
10µF
VOUT2
2.2µH 1.1V TO 1.8V
4.7µF
VOUT3
1.8V TO 3.3V
1µF
SCL
XSHTDN
EN/GPIO
SYNC
EXT. FREQ
9.6/19.2MHz
DGND AGND
Figure 1.
The ADP5020 provides high performance, reduces component
count and size, and is lower in cost when compared to conven-
tional designs.
The ADP5020 runs on input voltage from 2.4 V to 5.5 V and
supports one-cell lithium-ion (Li+) batteries. The high perfor-
mance LDO maximizes noise suppression. The ADP5020 can be
activated via an I2C® interface or through a dedicated enable input.
During logic-controlled shutdown, the input is disconnected
from the output source, and the part draws 1 μA typical from
the input source. Other key features include undervoltage lockout
to prevent deep-battery discharge and soft start to prevent input
current overshoot at startup. The ADP5020 is available in a
20-lead LFCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.



ADP5020
ADP5020www.DataSheet4U.com
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Typical Applications Circuit............................................................ 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 2 
Functional Block Diagram .............................................................. 3 
Specifications..................................................................................... 4 
Switching Specifications .............................................................. 5 
DC-to-DC Conversion Specifications, Buck 1 Regulator....... 5 
DC-to-DC Conversion Specifications, Buck 2 Regulator....... 6 
VOUT3 Specifications, Low Dropout (LDO) Regulator ........ 6 
I2C Timing Specifications............................................................ 7 
Absolute Maximum Ratings............................................................ 8 
Thermal Resistance ...................................................................... 8 
ESD Caution.................................................................................. 8 
Pin Configuration and Function Descriptions............................. 9 
Typical Performance Characteristics ........................................... 10 
Theory of Operation ...................................................................... 13 
Circuit Operation ....................................................................... 13 
Internal Compensation.............................................................. 13 
Current Limiting and Short-Circuit Protection..................... 13 
Synchronization.......................................................................... 13 
I2C Interface ................................................................................ 13 
REVISION HISTORY
4/09—Revision 0: Initial Version
Undervoltage Lockout ............................................................... 13 
Thermal Shutdown .................................................................... 13 
Control Registers ............................................................................ 14 
Device Address ........................................................................... 14 
Register Map ............................................................................... 14 
Register Descriptions................................................................. 14 
Power-Up/Power-Down Sequence............................................... 17 
Sequencer .................................................................................... 17 
Default Power-On Sequence with EN Pin .............................. 17 
Power-On Sequence Using the I2C Interface.............................. 19 
Power-Up/Power-Down State Flow......................................... 20 
Applications Information .............................................................. 21 
Power Good Status ..................................................................... 21 
XSHTDN Logic .......................................................................... 21 
Components Selection............................................................... 21 
LDO Input Filter......................................................................... 22 
Layout Recommendations............................................................. 23 
Applications Schematic ............................................................. 23 
PCB Board Layout Recommendations.................................... 24 
External Component List .......................................................... 24 
Outline Dimensions ....................................................................... 25 
Ordering Guide .......................................................................... 25 
Rev. 0 | Page 2 of 28




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