Register. AT16646F Datasheet

AT16646F Datasheet PDF

Part AT16646F
Description AT16646 Fast Logic 16-Bit Tri-State Register
Feature AT16646F; AT16646 Features • • • • • • Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TP.
Manufacture ATMEL Corporation
Datasheet
Download AT16646F Datasheet




AT16646F
AT16646
Features
Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns
Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1ns/100 pF
(G grade)
Very low ground bounce < 0.6 V @ VCC=5.00 V, Ta=25°C
Typical output skew 0.25ns
Bus Hold circuitry to retain last active state during Tri-State
Available in SSOP and TSSOP packages
Description
Atmel’s AT16646 devices are 16-bit high speed, low power Tri-statable D type
registers, ideal for use in systems requiring both transparent and registered mode
functions. They are organized as two separate 8-bit bus transceivers. Data flow is
bi-directional, and can be controlled for multiplexed transmission between A bus and
B bus either directly or from the D registers by use of the direction control pin (xDir),
output enable (xOE), and select lines (xSAB and xSBA). Storage of data on the A bus
and B bus is controlled by the output pins. They have very low ground bounce and
excellent input noise rejection, giving the user stable signals in a high speed
environment. The Bus Hold feature eliminates the need for pull-up or pull-down
resistors and retains the last active state during a Tri-State event.
Functional Block Diagram
AT16646
Fast Logic
16-Bit
Tri-State
Register
AT16646F
AT16646G
Pin Configurations
Pin Names Descriptions
xDir, xOE
Output Enable Inputs
xCLKAB,xCLKBA Clock Pulse Inputs
xSAB, xSBA Output Data Source Select Inputs
xAχ Data Register A Inputs
Data Register B Outputs
xBχ Data Register B Inputs
Data Register A Outputs
SSOP/TSSOP
1DIR
1CLKAB
1SAB
GND
1A1
1A2
VCC
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2SAB
2CLKAB
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1CLKBA
1SBA
GND
1B1
1B2
VCC
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
2SBA
2CLKBA
2OE
Top View
0757B
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AT16646F
Function Table(1)
xOE
H
H
L
L
L
L
xDir
X
X
L
L
H
H
Inputs
xCLKAB
H or L
X
X
X
H or L
xCLKBA
H or L
X
H or L
X
X
xSAB
X
X
X
X
L
H
xSBA
X
X
L
H
X
X
Data I/O(2)
xAχ
Input
xBχ
Input
Output
Input
Input
Output
Operation or Function
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Notes: 1. H = High voltage level, L = Low voltage level, X = Don’t care, = Low-to-High transition
2. The data output functions may be enabled or disabled by various signals at the xOE or xDir inputs. Data input functions
are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
Absolute Maximum Ratings*
Operating Temperature........................ 0°C to +70°C
Storage Temperature ...................... -65°C to +150°C
Voltage on any Pin
with Respect to Ground................. -2.0 V to +7.0 V(1)
Maximum Operating Voltage.............................. 6.0V
5.0 Volt DC Characteristics
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions beyond those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Notes:
1. Minimum voltage is -0.6 V dc which may
undershoot to -2.0 V for pulses of less than 20 ns.
Maximum output pin voltage is VCC +0.75 V dc
which may overshoot to +7.0 V for pulses of less
than 20 ns.
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = +5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions
Min Typ Max Units
ICC
Quiescent Power Supply
Current
VCC = Max, VIN = 3.4 V
0.8 1.2 mA
VIH Input High Voltage
2.0 V
VIL Input Low Voltage
IIH Input High Current (I/O Pins) VIN = VCC
IIL Input Low Current (I/O Pins) VIN = GND
IOZ Output Leakage Current
0.8 V
±15 µA
±15 µA
±10 µA
VOH(1)
Output High Voltage
F Grade only
VCC = 4.75 V
IOH = -10 mA
2.7 V
VOH(2)
Output High Voltage
G Grade only
VCC = 4.75 V
IOH = -12 mA
2.7 V
VOL Output Low Voltage (F Grade) IOL = 10 mA
0.55 V
VOL Output Low Voltage (G Grade) IOL = 12 mA
0.55 V
Note: 1. F grade: At VCC (max), the value of VOH(max) = 3.75 V and at VCC(min), VOH(max) = 3.25 V
2. G grade: At VCC (max), the value of VOH(max) = 3.75 V and at VCC(min), VOH(max) = 3.35 V
5-22 AT16646



AT16646F
AT16646
AC Characteristics
AT16646F
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions(1) Min Typ Max
Units
tPHL Propagation Delay
tPLH
CL = 50 pF
2.5 ns
tPZH Output Enable Time
tPZL
CL = 50 pF
7.4 ns
tPHZ Output Disable Time
tPLZ
CL = 50 pF
6.4 ns
tSK(1)
Output Skew
CL = 50 pF
0.5 ns
tPHL(1)
tPLH
Propagation Delay vs Output Loading
1.3 1.5 ns/100 pF
tsu
Set-up Time Bus to Clock
CL = 50 pF
2.0
ns
tH
Hold Time Bus to Clock
CL = 50 pF
2.0
ns
Note: 1. This parameter is guaranteed but not 100% tested.
AT16646G
Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)
Symbol
Parameter
Test Conditions(1) Min Typ Max
Units
tPHL Propagation Delay
tPLH
CL = 50 pF
2.0 ns
tPZH Output Enable Time
tPZL
CL = 50 pF
7.4 ns
tPHZ Output Disable Time
tPLZ
CL = 50 pF
5.8 ns
tSK(1)
tPHL(1)
tPLH
Output Skew
Propagation Delay vs Output Loading
CL = 50 pF
0.5
0.9 1.1
ns
ns/100 pF
tsu
Set-up Time Bus to Clock
CL = 50 pF
2.0
ns
tH Hold Time Bus to Clock
Note: 1. This parameter is guaranteed but not 100% tested.
Test Circuits(1,2)
VCC
7.0V
CL = 50 pF
2.0
Switch Position
Test
ns
Switch
Pulse
Generator
VIN
VOUT
D.U.T.
500
Open Drain
Disable Low
Enable Low
Closed
50 pF
RT 500
CL
Note:
1. Pulse Generator: Rate 1.0 MHz, tF 2.5 ns,
tR 2.5 ns.
2. AC tests are done with a single bit switching, and
timings need to be derated when multiple outputs are
switching in the same direction simultaneously. This
derating should not exceed 0.5 ns for 16 inputs switching
simultaneously.
All Other Tests
Open
Definitions:
CL = Load capacitance; Includes jig and probe capacitance.
RT = Termination resistance; Should be equal to ZOUT of the
Pulse Generator.
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