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Features
Servo Processing Unit (SPU), Using Dedicated 16-bit Instruction Cycle AVR® RISC
Cores (3), Giving 120 MIPS Maximum Processing Power with 40 MHz SYSCLK SPU Includes 17 x 17 Single-clock Cycle MAC On-chip Debugger Monitor for Program Development (OCDM) 8K Words Program RAM 4K Bytes Data ...
