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CDCLVD2106
Dual 1:6 Low Additive Jitter LVDS Buffer
Description
CDCLVD2106 www.ti.com SCAS902B – SEPTEMBER 2010 – REVISED JANUARY 2011 Dual 1:6 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2106 FEATURES 1 Dual 1:6 Differential Buffer Low Additive Jitter: <300 fs rms in 10 kHz – 20 MHz Low Within Bank Output Skew of 45 ps (Max) Universal Inputs Accept LVDS, LVPECL, LV
CMOS
One Input Dedicated for S...
Texas Instruments
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