CY29352 Datasheet

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CY29352 Datasheet - 11 Output Zero Delay Buffer

CY29352   CY29352  

Datasheet: CY29352 datasheet

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Description: CY29352 2.5V or 3.3V, 200 MHz, 11 Outpu t Zero Delay Buffer Features ■ ■ ■ Description The CY29352 is a low voltage high performance 200 MHz PLL b ased zero delay buffer designed for hig h speed clock distribution applications . The CY29352 features an LVCMOS refere nce clock input and provides 11 outputs partitioned in three banks of five, fo ur, and two outputs. Bank A divides the VCO output by four and six while bank B divides by four and two, and bank C d ivides by two and four per SEL(A:C) set tings, see Table 3 on page 3. These div iders allow output to input ratios of 3 :1, 2:1, 3:2, 1:1, 2:3, 1:2, and 1:3. E ach LVCMOS compatible output drives 50 series or parallel terminated transmission

Manufacture Part Number Description

Cypress Semiconductor


11 Output Zero Delay Buffer

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