DatasheetsPDF.com

CY7C009 RAM Datasheet PDF

64K/128K x 8/9 Dual-Port Static RAM

64K/128K x 8/9 Dual-Port Static RAM

 

 

 

Part Number CY7C009
Description 64K/128K x 8/9 Dual-Port Static RAM
Feature 25/0251 CY7C008/009 CY7C018/019 Featur es
• True Dual-Ported memory cells wh ich allow simultaneous access of the sa me memory location
• 64K x 8 organiza tion (CY7C008)
• 128K x 8 organizatio n (CY7C009)
• 64K x 9 organization (C Y7C018)
• 128K x 9 organization (CY7C 019)
• 0.
35-micron CMOS for optimum s peed/power
• High-speed access: 12[1] /15/20 ns
• Low operating power — A ctive: ICC = 180 mA (typical) — Stand by: ISB3 = 0.
05 mA (typical) Logic Blo ck Diagram R/WL CE0L CE1L OEL CEL 64 K/128K x 8/9 Dual-Port Static RAM
• F ully asynchronous operation
• Automat ic power-down
• Expandable data bus t o .
Manufacture Cypress
Datasheet
Download CY7C009 Datasheet

CY7C009

 

 

 


 

 

 

Part Number CY7C009V
Description 128K x 8 Dual-Port Static RAM
Feature CY7C008V CY7C018V CY7C009V CY7C019V 3.
3 V, 128K × 8 Dual-Port Static RAM CY7C 009V 3.
3 V, 128K × 8 Dual-Port Static RAM 3.
3 V, 128K × 8 Dual-Port Static RAM Features ■ True dual-ported memor y cells which allow simultaneous access of the same memory location ■ 128K 8 organization (CY7C009) ■ 0.
35-mic ron CMOS for optimum speed/power ■ Hi gh-speed access: 15/20/25 ns ■ Low op erating power ❐ Active: ICC = 115 mA (typical) ❐ Standby: ISB3 = 10 A ( typical) ■ Fully asynchronous operati on ■ Automatic power-down ■ Expand able data bus to 16 bits or more using Master/Slave chip select when using mor e .
Manufacture Cypress
Datasheet
Download CY7C009V Datasheet

CY7C009V

 

 

 


 

 

 

Part Number CY7C009
Description 64K/128K x 8/9 Dual-Port Static RAM
Feature 25/0251 CY7C008/009 CY7C018/019 Featur es
• True Dual-Ported memory cells wh ich allow simultaneous access of the sa me memory location
• 64K x 8 organiza tion (CY7C008)
• 128K x 8 organizatio n (CY7C009)
• 64K x 9 organization (C Y7C018)
• 128K x 9 organization (CY7C 019)
• 0.
35-micron CMOS for optimum s peed/power
• High-speed access: 12[1] /15/20 ns
• Low operating power — A ctive: ICC = 180 mA (typical) — Stand by: ISB3 = 0.
05 mA (typical) Logic Blo ck Diagram R/WL CE0L CE1L OEL CEL 64 K/128K x 8/9 Dual-Port Static RAM
• F ully asynchronous operation
• Automat ic power-down
• Expandable data bus t o .
Manufacture Cypress
Datasheet
Download CY7C009 Datasheet

CY7C009

 

 

 

More Datasheet

 

@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)