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CY7C1145KV18
18-Mbit QDR II+ SRAM Four-Word Burst Architecture
Description
CY7C1143KV18/CY7C1145KV18 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) 18-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency) Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 450-MHz clock for high bandwidth ■ Four-word burst for reducing address bus frequenc...
Cypress Semiconductor
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