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CY7C1264XV18

Cypress Semiconductor

36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture

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CY7C1262XV18 CY7C1264XV18 36-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) 36-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 450 MHz clock for high bandwidth ■ Two-word burst for reducing address bus...


Cypress Semiconductor

CY7C1264XV18

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