DATA SHEET
128M bits DDR SDRAM
EDD1232AAFA (4M words × 32 bits)
Description
The EDD1232AAFA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data transfer is realized by the 2 bits prefetch-pipelined architecture. Data strobe (DQS) ...
