EM47FM0888SBA
4Gb (64M× 8Bank×8) Double DATA RATE 3 low voltage SDRAM
Features
JEDEC Standard VDD/VDDQ = 1.5V±0.075V
All inputs and outputs are compatible with SSTL_15
interface. Fully differential clock inputs (CK, /CK) operation. Eight Banks Posted CAS by programmable additive latency Bust length: 4 with Burst Chop (BC) and 8. CAS Write Late...