Part Number | HYB25D512800DF |
Manufacturer | Qimonda |
Title | 512M DDR SDRAM |
Description | Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locatio... |
Features |
Double data rate architecture: two data transfers per clock cycle Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver DQS is edge-aligned with data for reads and is center-aligned with data for writes Differential clock inputs (CK and ... |
Published | Feb 21, 2009 |
Datasheet | HYB25D512800DF PDF File |