• 25-bit 1:1 or 14-bit 1:2 configurable registered buffer • Supports SSTL_18 JEDEC specification on data inputs and outputs • Supports LVCMOS switching levels on CSR# and RESET# inputs • Low voltage operation VDD = 1.7V to 1.9V • Available in 96 BGA...
ICSSSTU32864 PDF File
