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IS61DDPB24M18

Part Number	IS61DDPB24M18
Manufacturer	Integrated Silicon Solution
Description	DDR-IIP (Burst of 2) CIO Synchronous SRAMs
Published	Jul 25, 2016
Datasheet	IS61DDPB24M18 PDF File

Features

• 2M x 36 or 4M x 18.

• On-chip delay-locked loop (DLL) for wide data valid window.

• Common data input/output bus.
• Synchronous pipeline read with self-timed late
write operation.

• Double data rate (DDR-IIP) interface for read and write input port...

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