18Mb QUADP (Burst 2) Synchronous SRAM
Description
IS61QDP2B21M18A/A1/A2 IS61QDP2B251236A/A1/A2
1Mx18, 512Kx36 18Mb QUADP (Burst 2) Synchronous SRAM
(2.0 CYCLE READ LATENCY)
OCTOBER 2014
FEATURES
512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Separate independent read and write ports with concurrent read and write operations.
Synchronous pipel...
Similar Datasheet