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LPC811 microcontroller Datasheet PDF32-bit ARM Cortex-M0+ microcontroller 32-bit ARM Cortex-M0+ microcontroller |
| Part Number | LPC811 |
|---|---|
| Description | 32-bit ARM Cortex-M0+ microcontroller |
| Feature | LPC81xM
32-bit ARM® Cortex®-M0+ micro controller; up to 16 kB flash and 4 kB SRAM
Rev. 4. 7 — 19 March 2021 Produ ct data sheet 1. General description T he LPC81xM are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating a t CPU frequencies of up to 30 MHz. The LPC81xM support up to 16 kB of flash me mory and 4 kB of SRAM. The peripheral c omplement of the LPC81xM includes a CRC engine, one I2C-bus interface, up to t hree USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up time r, and state-configurable timer, one co mparator, function-configurable I/O por ts through a switc . |
| Manufacture | NXP |
| Datasheet |
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| Part Number | LPC811M001JDH16 |
|---|---|
| Description | 32-bit ARM Cortex-M0+ microcontroller |
| Feature | LPC81xM
32-bit ARM® Cortex®-M0+ micro controller; up to 16 kB flash and 4 kB SRAM
Rev. 4. 7 — 19 March 2021 Produ ct data sheet 1. General description T he LPC81xM are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating a t CPU frequencies of up to 30 MHz. The LPC81xM support up to 16 kB of flash me mory and 4 kB of SRAM. The peripheral c omplement of the LPC81xM includes a CRC engine, one I2C-bus interface, up to t hree USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up time r, and state-configurable timer, one co mparator, function-configurable I/O por ts through a switc . |
| Manufacture | NXP |
| Datasheet |
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| Part Number | LPC811M001FDH16 |
|---|---|
| Description | 32-bit ARM Cortex-M0+ microcontroller |
| Feature | LPC81xM
32-bit ARM® Cortex®-M0+ micro controller; up to 16 kB flash and 4 kB SRAM
Rev. 4. 7 — 19 March 2021 Produ ct data sheet 1. General description T he LPC81xM are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating a t CPU frequencies of up to 30 MHz. The LPC81xM support up to 16 kB of flash me mory and 4 kB of SRAM. The peripheral c omplement of the LPC81xM includes a CRC engine, one I2C-bus interface, up to t hree USARTs, up to two SPI interfaces, one multi-rate timer, self wake-up time r, and state-configurable timer, one co mparator, function-configurable I/O por ts through a switc . |
| Manufacture | NXP |
| Datasheet |
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