Part Number
|
M53D2561616A |
Manufacturer
|
ESMT |
Description
|
Mobile DDR SDRAM |
Published
|
Sep 20, 2018 |
Datasheet
|
M53D2561616A PDF File
|
Features
JEDEC Standard Internal pipelined double-data-rate architecture, two data
access per clock cycle Bi-directional data strobe (DQS) No DLL; CLK to DQS is not synchronized.
Differential clock inputs (CLK and CLK ) Four bank operation CAS L...
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