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ODCXXX04

Part Number	ODCXXX04
Manufacturer	AMI
Description	CMOS Gate Array
Published	Mar 12, 2018
Detailed Description	2'&;;;[[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODCXXXxx is a family of 1 to 24 mA, non-inverting, CMOS-leve...
Datasheet	ODCXXX04 PDF File

Overview

2'&;;;[[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODCXXXxx is a family of 1 to 24 mA, non-inverting, CMOS-level output buffer pieces.
Logic Symbol Truth Table ODCXXXxx A PADM A PADM LL HH HDL Syntax Verilog ODCXXXxx inst_name (PADM, A); VHDL.
.
inst_name: ODCXXXxx port map (PADM, A); Pin Loading Pin Name A (eq-load) ODCXXX01 4.
3 ODCXXX02 4.
3 ODCXXX04 6.
2 Load ODCXXX08 8.
3 ODCXXX12 8.
2 Power Characteristics Cell Output Drive (mA) ODCXXX01 1 ODCXXX02 2 ODCXXX04 4 ODCXXX08 8 ODCXXX12 12 ODCXXX16 16 ODCXXX24 24 a.
See page 2-15 for power equation.
Power Characteristicsa Static IDD (TJ = 85°C) (nA) TBD EQLpd (Eq-loa...

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