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TL072 AMPLIFIERS Datasheet PDFOPERATIONAL AMPLIFIERS OPERATIONAL AMPLIFIERS |
| Part Number | TL072 |
|---|---|
| Description | OPERATIONAL AMPLIFIERS |
| Feature | Order this document by TL071C/D
Low Noi se, JFET Input
Operational Amplifiers
T hese low noise JFET input operational a mplifiers combine two state–of–the art analog technologies on a single m onolithic integrated circuit. Each inte rnally compensated operational amplifie r has well matched high voltage JFET in put device for low input offset voltage . The BIFET technology provides wide ba ndwidths and fast slew rates with low i nput bias currents, input offset curren ts, and supply currents. Moreover, the devices exhibit low noise and low harmo nic distortion, making them ideal for u se in high fidelity . |
| Manufacture | Motorola |
| Datasheet |
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| Part Number | TL072 |
|---|---|
| Description | LOW NOISE DUAL J-FET OPERATIONAL AMPLIFIER |
| Feature | UNISONIC TECHNOLOGIES CO. , LTD TL072 L INEAR INTEGRATED CIRCUIT LOW NOISE DUA L J-FET OPERATIONAL AMPLIFIER DESC RIPTION The UTC TL072 is a high speed J -FET input quad operational amplifier. It incorporates well matched, high volt age J-FET and bipolar transistors in a monolithic integrated circuit. The devi ce features high slew rates, low input bias and offset current, and low offset voltage temperature coefficient. FEATURES * Low power consumption * Wid e common-mode (up to VCC+ ) and differe ntial voltage range * Low input bias an d offset current * Low noise en = 15nV / Hz (typ. ) * Outp . |
| Manufacture | UTC |
| Datasheet |
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| Part Number | TL072 |
|---|---|
| Description | Low noise JFET dual operational amplifiers |
| Feature | TL072, TL072A, TL072B
Low noise JFET du al operational amplifiers
Datasheet - production data
D SO8
Pin connections (top view)
1
2
-
3
+
4
8
7
-
6
+
5
1 - Output 1 2 - Inverting inp ut 1 3 - Non-inverting input 1 4 - VCC5 - Non-inverting input 2 6 -Inverting i nput 2
7 - Output 2 8 - VCC+
Features
• Wide common-mode (up to VCC+) and d ifferential voltage range • Low input bias and offset current • Low noise en = 15 nV/√Hz (typ) • Output short -circuit protection • High input impe dance JFET input stage • Low harmonic distortion: 0. 01 % (typical) • Inter nal frequency compensation • L . |
| Manufacture | STMicroelectronics |
| Datasheet |
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