Microcontrollers. TMS320F28378D Datasheet

TMS320F28378D Datasheet PDF

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TMS320F28379D, TMS320F28378D, TMS320F28377D
TMS320F28376D, TMS320F28375D, TMS320F28374D
TMS320F2837xD Dual-Core Delfino™ Microcontrollers
1 Device Overview
1.1 Features
• Dual-Core Architecture
– Two TMS320C28x 32-Bit CPUs
– 200 MHz
– IEEE 754 Single-Precision Floating-Point Unit
– Trigonometric Math Unit (TMU)
– Viterbi/Complex Math Unit (VCU-II)
• Two Programmable Control Law Accelerators
– 200 MHz
– IEEE 754 Single-Precision Floating-Point
– Executes Code Independently of Main CPU
• On-Chip Memory
– 512KB (256KW) or 1MB (512KW) of Flash
– 172KB (86KW) or 204KB (102KW) of RAM
(ECC-Protected or Parity-Protected)
– Dual-Zone Security Supporting Third-Party
– Unique Identification Number
• Clock and System Control
– Two Internal Zero-Pin 10-MHz Oscillators
– On-Chip Crystal Oscillator
– Windowed Watchdog Timer Module
– Missing Clock Detection Circuitry
• 1.2-V Core, 3.3-V I/O Design
• System Peripherals
– Two External Memory Interfaces (EMIFs) With
ASRAM and SDRAM Support
– Dual 6-Channel Direct Memory Access (DMA)
– Up to 169 Individually Programmable,
Multiplexed General-Purpose Input/Output
(GPIO) Pins With Input Filtering
– Expanded Peripheral Interrupt Controller (ePIE)
– Multiple Low-Power Mode (LPM) Support With
External Wakeup
• Communications Peripherals
– USB 2.0 (MAC + PHY)
– Support for 12-Pin 3.3 V-Compatible Universal
Parallel Port (uPP) Interface
– Two Controller Area Network (CAN) Modules
– Three High-Speed (up to 50-MHz) SPI Ports
– Two Multichannel Buffered Serial Ports
– Four Serial Communications Interfaces
(SCI/UART) (Pin-Bootable)
– Two I2C Interfaces (Pin-Bootable)
• Analog Subsystem
– Up to Four Analog-to-Digital Converters (ADCs)
– 16-Bit Mode
– 1.1 MSPS Each (up to 4.4-MSPS System
– Differential Inputs
– Up to 12 External Channels
– 12-Bit Mode
– 3.5 MSPS Each (up to 14-MSPS System
– Single-Ended Inputs
– Up to 24 External Channels
– Single Sample-and-Hold (S/H) on Each ADC
– Hardware-Integrated Post-Processing of ADC
– Saturating Offset Calibration
– Error From Setpoint Calculation
– High, Low, and Zero-Crossing Compare,
With Interrupt Capability
– Trigger-to-Sample Delay Capture
– Eight Windowed Comparators With 12-Bit
Digital-to-Analog Converter (DAC) References
– Three 12-Bit Buffered DAC Outputs
• Enhanced Control Peripherals
– 24 Pulse Width Modulator (PWM) Channels
With Enhanced Features
– 16 High-Resolution Pulse Width Modulator
(HRPWM) Channels
– High Resolution on Both A and B Channels of
8 PWM Modules
– Dead-Band Support (on Both Standard and
High Resolution)
– Six Enhanced Capture (eCAP) Modules
– Three Enhanced Quadrature Encoder Pulse
(eQEP) Modules
– Eight Sigma-Delta Filter Module (SDFM) Input
Channels, 2 Parallel Filters per Channel
– Standard SDFM Data Filtering
– Comparator Filter for Fast Action for Out of
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

TMS320F28379D, TMS320F28378D, TMS320F28377D
TMS320F28376D, TMS320F28375D, TMS320F28374D
• Configurable Logic Block (CLB)
– Augments Existing Peripheral Capability
– Supports Position Manager Solutions
• Package Options:
– Lead-Free, Green Packaging
– 337-Ball New Fine Pitch Ball Grid Array
(nFBGA) [ZWT Suffix]
– 176-Pin PowerPAD™ Thermally Enhanced Low-
Profile Quad Flatpack (HLQFP) [PTP Suffix]
– 100-Pin PowerPAD Thermally Enhanced Thin
Quad Flatpack (HTQFP) [PZP Suffix]
1.2 Applications
Advanced Driver Assistance Systems (ADAS)
Building Automation
Electronic Point of Sale
Electric Vehicle/Hybrid Electric Vehicle (EV/HEV)
Factory Automation
Grid Infrastructure
• Temperature Options:
– T: –40ºC to 105ºC Junction
– S: –40ºC to 125ºC Junction
– Q: –40ºC to 125ºC Free-Air
(AEC Q100 Qualification for Automotive
Industrial Transport
Medical, Healthcare, and Fitness
Motor Drives
Power Delivery
Telecom Infrastructure
Test and Measurement
1.3 Description
C2000™ 32-bit microcontrollers are optimized for processing, sensing, and actuation to improve closed-
loop performance in real-time control applications such as industrial motor drives; solar inverters and
digital power; electrical vehicles and transportation; motor control; and sensing and signal processing. The
C2000 line includes the Delfino™ Premium Performance family and the Piccolo™ Entry Performance
The Delfino™ TMS320F2837xD is a powerful 32-bit floating-point microcontroller unit (MCU) designed for
advanced closed-loop control applications such as industrial motor drives; solar inverters and digital
power; electrical vehicles and transportation; and sensing and signal processing. Complete development
packages for digital power and industrial drives are available as part of the powerSUITE and
DesignDRIVE initiatives. While the Delfino product line is not new to the TMS320C2000™ portfolio, the
F2837xD supports a new dual-core C28x architecture that significantly boosts system performance. The
integrated analog and control peripherals also let designers consolidate control architectures and eliminate
multiprocessor use in high-end systems.
The dual real-time control subsystems are based on TI’s 32-bit C28x floating-point CPUs, which provide
200 MHz of signal processing performance in each core. The C28x CPUs are further boosted by the new
TMU accelerator, which enables fast execution of algorithms with trigonometric operations common in
transforms and torque loop calculations; and the VCU accelerator, which reduces the time for complex
math operations common in encoded applications.
The F2837xD microcontroller family features two CLA real-time control coprocessors. The CLA is an
independent 32-bit floating-point processor that runs at the same speed as the main CPU. The CLA
responds to peripheral triggers and executes code concurrently with the main C28x CPU. This parallel
processing capability can effectively double the computational performance of a real-time control system.
By using the CLA to service time-critical functions, the main C28x CPU is free to perform other tasks, such
as communications and diagnostics. The dual C28x+CLA architecture enables intelligent partitioning
between various system tasks. For example, one C28x+CLA core can be used to track speed and
position, while the other C28x+CLA core can be used to control torque and current loops.
The TMS320F2837xD supports up to 1MB (512KW) of onboard flash memory with error correction code
(ECC) and up to 204KB (102KW) of SRAM. Two 128-bit secure zones are also available on each CPU for
code protection.
2 Device Overview
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