Controller. UC2823B Datasheet

UC2823B Datasheet PDF


Part Number

UC2823B

Description

High Speed PWM Controller

Manufacture

Unitrode

Total Page 9 Pages
PDF Download
Download UC2823B Datasheet


UC2823B Datasheet
UC1823A,B/1825A,B
UC2823A,B/2825A,B
UC3823A,B/3825A,B
High Speed PWM Controller
FEATURES
• Improved versions of the
UC3823/UC3825 PWMs
• Compatible with Voltage or
Current-Mode Topologies
• Practical Operation at Switching
Frequencies to 1MHz
• 50ns Propagation Delay to Output
• High Current Dual Totem Pole
Outputs (2A Peak)
• Trimmed Oscillator Discharge
Current
• Low 100µA Startup Current
• Pulse-by-Pulse Current Limiting
Comparator
• Latched Overcurrent Comparator
With Full Cycle Restart
BLOCK DIAGRAM
DESCRIPTION
The UC3823A & B and the UC3825A & B family of PWM control ICs are im-
proved versions of the standard UC3823 & UC3825 family. Performance en-
hancements have been made to several of the circuit blocks. Error amplifier gain
bandwidth product is 12MHz while input offset voltage is 2mV. Current limit
threshold is guaranteed to a tolerance of 5%. Oscillator discharge current is spec-
ified at 10mA for accurate dead time control. Frequency accuracy is improved
to 6%. Startup supply current, typically 100µA, is ideal for off-line applications.
The output drivers are redesigned to actively sink current during UVLO at no
expense to the startup current specification. In addition each output is capable
of 2A peak currents during transitions.
Functional improvements have also been implemented in this family. The
UC3825 shutdown comparator is now a high-speed overcurrent comparator with
a threshold of 1.2V. The overcurrent comparator sets a latch that ensures full
discharge of the soft start capacitor before allowing a restart. While the fault latch
is set, the outputs are in the low state. In the event of continuous faults, the soft
start capacitor is fully charged before discharge to insure that the fault frequency
does not exceed the designed soft start period. The UC3825 Clock pin has be-
come CLK/LEB. This pin combines the functions of clock output and leading
edge blanking adjustment and has been buffered for easier interfacing.
continued
* Note: 1823A,B Version Toggles Q and Q are always low
9/95
UDG-95101

UC2823B Datasheet
DESCRIPTION (cont.)
The UC3825A,B has dual alternating outputs and the same
pin configuration of the UC3825. The UC3823A,B outputs op-
erate in phase with duty cycles from zero to less than 100%.
The pin configuration of the UC3823A,B is the same as the
UC3823 except pin 11 is now an output pin instead of the ref-
erence pin to the current limit comparator. “A” version parts
have UVLO thresholds identical to the original UC3823/25.
The “B” versions have UVLO thresholds of 16 and 10V, in-
tended for ease of use in off-line applications.
Consult Application Note U-128 for detailed technical and ap-
plications information. Contact the factory for further pack-
aging and availability information.
Device
UVLO
DMAX
UC3823A
UC3823B
UC3825A
UC3825B
9.2V/8.4V
16V/10V
9.2V/8.4V
16V/10V
< 100%
< 100%
< 50%
< 50%
UC1823A,B/1825A,B
UC2823A,B/2825A,B
UC3823A,B/3825A,B
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VC, VCC) ....................................................22V
Output Current, Source or Sink (Pins OUTA, OUTB)
DC ..................................................................................0.5A
Pulse (0.5µs) ...................................................................2.2A
Power Ground (PGND) ......................................................±0.2V
Analog Inputs
(INV, NI, RAMP)...................................................0.3V to 7V
(ILIM, SS).............................................................0.3V to 6V
Clock Output Current (CLK/LEB) .......................................5mA
Error Amplifier Output Current (EAOUT)..............................5mA
Soft Start Sink Current (SS) ...............................................20mA
Oscillator Charging Current (RT)........................................5mA
Power Dissipation at TA = 60°C..............................................1W
Storage Temperature Range............................65°C to +150°C
Junction Temperature.......................................55°C to +150°C
Lead Temperature (Soldering, 10 sec.).............................300°C
All currents are positive into, negative out of the specified terminal.
Consult Packaging Section of Databook for thermal limitations
and considerations of packages.
CONNECTION DIAGRAMS
DIL-16, SOIC-16, (Top View)
J or N Package; DW Package
PLCC-20, LCC-20, (Top View)
Q, L Packages
ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = 55°C to +125°C for the
UC1823A,B and UC1825A,B; 40°C to +85°C for the UC2823A,B and UC2825A,B; 0°C to +70°C for the UC3823A,B and
UC3825A,B; RT = 3.65k, CT = 1nF, VCC = 12V, TA = TJ.
PARAMETER
Reference Section
Output Voltage
Line Regulation
Load Regulation
Total Output Variation
TEST CONDITIONS
TJ = 25°C, Io = 1mA
12 < VCC < 20V
1mA < Io < 10mA
Line, Load, Temp
MIN TYP MAX UNITS
5.05 5.1 5.15 V
2 15 mV
5 20 mV
5.03 5.17 V
Temperature Stability
Output Noise Voltage
Long Term Stability
Short Circuit Current
TMIN < TA < TMAX (Note 1)
10Hz < f < 10kHz (Note 1)
TJ = 125°C, 1000 hours (Note 1)
VREF = 0V
0.2 0.4 mV/°C
50 µVRMS
5 25 mV
30 60 90 mA
2


Features Datasheet pdf UC1823A,B/1825A,B UC2823A,B/2825A,B UC38 23A,B/3825A,B High Speed PWM Controlle r FEATURES • • • • • • • • • Improved versions of the UC3823 /UC3825 PWMs Compatible with Voltage or Current-Mode Topologies Practical Oper ation at Switching Frequencies to 1MHz 50ns Propagation Delay to Output High C urrent Dual Totem Pole Outputs (2A Peak ) Trimmed Oscillator Discharge Current Low 100µA Startup Current Pulse-by-Pul se Current Limiting Comparator Latched Overcurrent Comparator With Full Cycle Restart DESCRIPTION The UC3823A & B an d the UC3825A & B family of PWM control ICs are improved versions of the stand ard UC3823 & UC3825 family. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12MHz while input offset voltage is 2mV. Current li mit threshold is guaranteed to a tolera nce of 5%. Oscillator discharge current is specified at 10mA for accurate dead time control. Frequency accuracy is improved to 6%. Startup supply current, typic.
Keywords UC2823B, datasheet, pdf, Unitrode, High, Speed, PWM, Controller, C2823B, 2823B, 823B, UC2823, UC282, UC28, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute, Equivalent




@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)