Data Sheet
ZL40260
Low Skew, Low Additive Jitter 2 x10 LVPECL Fanout Buffer
Features
Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML) or single ended LVCMOS signal
Ten 2.5V/3.3V LVPECL outputs
Ultra-low additive jitter: 53fs for 125 MHz clock measured in 12KHz to 20MHz band
Supports clock frequencies from 0 to 1.6GHz
Supports 2...
