EFFECT TRANSISTOR. NP33N075YDF Datasheet

NP33N075YDF TRANSISTOR. Datasheet pdf. Equivalent

Part NP33N075YDF
Description MOS FIELD EFFECT TRANSISTOR
Feature NP33N075YDF MOS FIELD EFFECT TRANSISTOR Preliminary Data Sheet R07DS0363EJ0100 Rev.1.00 Jun 30, 201.
Manufacture Renesas
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NP33N075YDF MOS FIELD EFFECT TRANSISTOR Preliminary Data Sh NP33N075YDF Datasheet
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NP33N075YDF
NP33N075YDF
MOS FIELD EFFECT TRANSISTOR
Preliminary Data Sheet
R07DS0363EJ0100
Rev.1.00
Jun 30, 2011
Description
The NP33N075YDF is N-channel MOS Field Effect Transistor designed for high current switching applications.
Features
Low on-state resistance
RDS(on) = 28 mΩ MAX. (VGS = 10 V, ID = 17 A)
Low Ciss: Ciss = 1300 pF TYP. (VDS = 25 V, VGS = 0 V)
Logic level drive type
Designed for automotive application and AEC-Q101 qualified
Small size package 8-pin HSON
Ordering Information
Part No.
NP33N075YDF-E1-AY 1
NP33N075YDF-E2-AY 1
Lead Plating
Pure Sn (Tin)
Packing
Tape 2500 p/reel
Taping (E1 type)
Taping (E2 type)
Note: 1. Pb-free (This product does not contain Pb in the external electrode.)
Package
8-pin HSON
Absolute Maximum Ratings (TA = 25°C)
Item
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) 1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C) 2
Channel Temperature
Storage Temperature
Repetitive Avalanche Current 3
Repetitive Avalanche Energy 3
Symbol
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
PT2
Tch
Tstg
IAR
EAR
Ratings
75
±20
±33
±66
92
1.0
175
55 to +175
21
44
Unit
V
V
A
A
W
W
°C
°C
A
mJ
Thermal Resistance
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance 2
Rth(ch-C)
Rth(ch-A)
1.63
150
°C/W
°C/W
Notes: 1. TC = 25°C, PW 10 μs, Duty Cycle 1%
2. Mounted on glass epoxy substrate of 40 mm x 40 mm x 1.6 mmt with 4% copper area (35 μm)
3. Tch(peak) 150°C, RG = 25 Ω
R07DS0363EJ0100 Rev.1.00
Jun 30, 2011
Page 1 of 6



NP33N075YDF
NP33N075YDF
Electrical Characteristics (TA = 25°C)
Item
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance 1
Drain to Source On-state
Resistance 1
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage 1
Reverse Recovery Time
Reverse Recovery Charge
Note: 1. Pulsed test
Symbol
IDSS
IGSS
VGS(th)
| yfs |
RDS(on)1
RDS(on)2
RDS(on)3
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
QG
QGS
QGD
VF(S-D)
trr
Qrr
MIN.
1.5
15
TYP.
2.0
30
23
25
26
1300
150
60
15
4
45
6
28
5
7
0.9
40
61
MAX.
1
±100
2.5
28
32
35
2000
200
110
30
10
90
15
42
1.5
Chapter Title
Unit
μA
nA
V
S
mΩ
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
Test Conditions
VDS = 75 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
VDS = VGS, ID = 250 μ A
VDS = 5 V, ID = 17 A
VGS = 10 V, ID = 17 A
VGS = 5 V, ID = 17 A
VGS = 4.5 V, ID = 17 A
VDS = 25 V,
VGS = 0 V,
f = 1 MHz
VDD = 38 V, ID = 17 A,
VGS = 10 V,
RG = 0 Ω
VDD = 60 V,
VGS = 10 V,
ID = 33 A
IF = 33 A, VGS = 0 V
IF = 33 A, VGS = 0 V,
di/dt = 100 A/μ s
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
RG = 25 Ω
PG.
VGS = 20 0 V
50 Ω
L
VDD
ID
VDD
IAS
BVDSS
VDS
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
PG. RG
VGS
0
τ
τ = 1 μs
Duty Cycle 1%
RL
VDD
VGS
VGS
Wave Form
10%
0
VDS
90%
VDS
VDS
Wave Form
0
td(on)
90%
VGS
90%
10% 10%
tr td(off)
tf
ton toff
D.U.T.
IG = 2 mA
PG. 50 Ω
RL
VDD
R07DS0363EJ0100 Rev.1.00
Jun 30, 2011
Page 2 of 6





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