PowerTrench MOSFETs. FDMC7200S Datasheet

FDMC7200S MOSFETs. Datasheet pdf. Equivalent


Part FDMC7200S
Description Dual N-Channel PowerTrench MOSFETs
Feature FDMC7200S Dual N-Channel PowerTrench® MOSFETs FDMC7200S June 2014 Dual N-Channel PowerTrench® MOS.
Manufacture Fairchild Semiconductor
Datasheet
Download FDMC7200S Datasheet


FDMC7200S Dual N-Channel PowerTrench® MOSFETs FDMC7200S Ju FDMC7200S Datasheet
Recommendation Recommendation Datasheet FDMC7200S Datasheet




FDMC7200S
FDMC7200S
June 2014
Dual N-Channel PowerTrench® MOSFETs
30 V, 22 mΩ, 10 mΩ
Features
Q1: N-Channel
„ Max rDS(on) = 22 mΩ at VGS = 10 V, ID = 6 A
„ Max rDS(on) = 34 mΩ at VGS = 4.5 V, ID = 5 A
Q2: N-Channel
„ Max rDS(on) = 10 mΩ at VGS = 10 V, ID = 8.5 A
„ Max rDS(on) = 13.5 mΩ at VGS = 4.5 V, ID = 7.2 A
„ RoHS Compliant
General Description
This device includes two specialized N-Channel MOSFETs in a
dual power33 (3mm X 3mm MLP) package. The switch node has
been internally connected to enable easy placement and routing
of synchronous buck converters. The control MOSFET (Q1) and
synchronous MOSFET (Q2) have been designed to provide
optimal power efficiency.
Applications
„ Mobile Computing
„ Mobile Internet Devices
„ General Purpose Point of Load
Pin 1
Bottom
D1
D1
D1
G1
D1
D2/S1
S2
S2
S2
G2
Bottom
VIN VIN
GHSVIN
VIN
SWITCH
NODE
GND
GND
GND
GLS
5 Q2
6
7
8
4
3
2
1
Q1
Power33
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation for Single Operation
TA = 25°C
Power Dissipation for Single Operation
TA = 25°C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 4)
(Note 3)
Q1 Q2
30 30
±20 ±20
18 13
23 46
7 1a 13 1b
40 27
12
1.9 1a
0.7 1c
32
2.5 1b
1.0 1d
-55 to +150
Units
V
V
A
W
°C
RθJA
RθJA
RθJC
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Case
Package Marking and Ordering Information
65 1a
180 1c
7.5
50 1b
125 1d
4.2
°C/W
Device Marking
FDMC7200S
Device
FDMC7200S
Package
Power 33
Reel Size
13”
Tape Width
12 mm
Quantity
3000 units
©2011 Fairchild Semiconductor Corporation
FDMC7200S Rev.C4
1
www.fairchildsemi.com



FDMC7200S
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, VGS = 0 V
ID = 1mA, VGS = 0 V
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
Type Min Typ Max Units
Q1 30
Q2 30
V
Q1
Q2
14
13
mV/°C
Q1
Q2
1
500
μA
Q1 100 nA
Q2 100 nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
rDS(on)
gFS
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Static Drain to Source On Resistance
Forward Transconductance
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1mA
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
VGS = 10 V, ID = 6 A
VGS = 4.5 V, ID = 5 A
VGS = 10 V, ID = 6 A, TJ = 125°C
VGS = 10 V, ID = 8.5 A
VGS = 4.5 V, ID = 7.2 A
VGS = 10 V, ID = 8.5 A, TJ = 125°C
VDD = 5 V, ID = 6 A
VDD = 5 V, ID = 8.5 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
1.0 2.3 3.0
1.0 2.0 3.0
V
-5
-6
mV/°C
17 22
25 34
23 30
mΩ
7.8 10.0
10.3 13.5
11.4 13.1
29
43
S
Dynamic Characteristics
Ciss Input Capacitance
Coss
Output Capacitance
Crss Reverse Transfer Capacitance
Rg Gate Resistance
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
495 660
1080 1436
pF
Q1
Q2
145 195
373 495
pF
Q1
Q2
20
35
30
52
pF
Q1 0.2 1.4 4.2
Q2 0.2 1.2 3.6
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Qg(TOT)
Total Gate Charge
Qg(TOT)
Total Gate Charge
Qgs Gate to Source Charge
Qgd Gate to Drain “Miller” Charge
Q1
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
Q2
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 6 A
Q2
VDD = 15 V
ID = 8.5 A
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
11 20
7.6 15
3.1 10
1.8 10
35 56
21 34
1.3 10
8.5 17
7.3 10
15.7 22
3.1 4.3
7.2 10
1.8
3
1
1.9
ns
ns
ns
ns
nC
nC
nC
nC
©2011 Fairchild Semiconductor Corporation
FDMC7200S Rev.C4
2
www.fairchildsemi.com







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)