Stereo Codec. CS42L56 Datasheet

CS42L56 Codec. Datasheet pdf. Equivalent

CS42L56 Datasheet
Recommendation CS42L56 Datasheet
Part CS42L56
Description Stereo Codec
Feature CS42L56; CS42L56 Ultralow Power, Stereo Codec with Class H Headphone Amp DIGITAL to ANALOG FEATURES  5 mW .
Manufacture Cirrus Logic
Datasheet
Download CS42L56 Datasheet




Cirrus Logic CS42L56
CS42L56
Ultralow Power, Stereo Codec with Class H Headphone Amp
DIGITAL to ANALOG FEATURES
5 mW Stereo Playback Power Consumption
99 dB Dynamic Range (A-wtd)
-86 dB THD+N
Digital Signal Processing Engine
– Bass & Treble Tone Control, De-emphasis
– Master Volume Control (+12 to -102 dB in
0.5 dB steps)
– Soft-ramp & Zero-cross Transitions
– Programmable Peak-detect and Limiter
– Beep Generator with Full Tone Control
Stereo Headphone and Line Amplifiers
Step-down/Inverting Charge Pump
Class H Amplifier - Automatic Supply Adj.
– High Efficiency
– Low EMI
Pseudo-differential Ground-centered Outputs
High HP Power Output at -75 dB THD+N
– 2 x 20 mW Into 16 @ 1.8 V
1 VRMS Line Output @ 1.8 V
Analog Vol. Ctl. (+12 to -60 dB in 1 dB steps)
Analog In to Analog Out Passthrough
Pop and Click Suppression
ANALOG to DIGITAL FEATURES
3.5 mW Stereo Record Power Consumption
95 dB Dynamic Range (A-wtd)
-87 dB THD+N
Configurable Analog Inputs
– Two Pseudo-differential Stereo Inputs or
– One Pseudo-differential Stereo Inputs +
One Standard Stereo Input + One Standard
Mono Input or
– Three Standard Stereo Inputs
– Pseudo-differential Inputs Reduce
Common Mode Signal Noise
– 3:1 Stereo Input MUX for ADC or
Passthrough
Analog Programmable Gain Amplifier (PGA)
– +12 to -6 dB in 0.5 dB steps
– +10 dB or +20 dB Additional Gain for
Microphone Inputs
Programmable, Low-noise MIC Bias Output
Programmable Automatic Level Control (ALC)
– Noise Gate for Noise Suppression
– Programmable Threshold &
Attack/Release Rates
Independent ADC Channel Control
High-pass Filter Disable for DC Measurements
Left Input 1
Pseudo Diff. Input /
Left Input 3
Right Input 1
Left Input 2
Pseudo Diff. Input /
Right Input 3
Right Input 2
Mic Bias Output
Analog Supply (VA)
+1.62 V to +2.75 V
Digital Supply (VLDO)
+1.62 V to +2.75 V
Charge Pump Supply (VCP)
+1.62 V to +2.75 V
LDO Regulator
Step-Down
Inverting
+VHP -VHP
0, +10, or
+20 dB
-6 to +12 dB
0.5 dB Steps
Multi-bit
 ADC
ALC Beep
Attenuator,
Boost, Mix
Mono mix,
Limiter, Bass,
Treble Adjust
Multi-bit
 DAC
ALC HPF
Programmable Mic Bias
Control Port Serial Audio Port
Level Shifter
-
+
+
-
-
+
+
-
Left Headphone Output
Pseudo Diff. Input
Right Headphone Output
Left Line Output
Pseudo Diff. Input
Right Line Output
http://www.cirrus.com
+1.62 V to +3.63 V
Interface Supply
I²C or SPI
Control
I²S or Left Justified
Serial Audio Input/
Output
Copyright Cirrus Logic, Inc. 2014
(All Rights Reserved)
Ground-Centered
Amplifiers
FEB '14
DS851F2



Cirrus Logic CS42L56
SYSTEM FEATURES
Audio (11.2896 MHz or 12.288 MHz) or USB
(12 MHz) Master Clock Input
Low-power Operation
– Stereo Anlg. Passthrough: 3.3 mW @1.8 V
– Stereo Rec. and Playback: 8.3 mW @1.8 V
Headphone Detect Input
High Performance 24-bit Converters
– Multi-bit Delta–Sigma Architecture
Integrated High Efficient Power Management
Reduces Power Consumption
– Step-down Charge Pump Improves
Efficiency
– Inverting Charge Pump Accommodates
Low System Voltage by Providing Negative
Rail for HP/Line Amp
– LDO Reg. Provides Low Digital Supply
Voltage
Digital Power Reduction
– Very Low ADC/DAC Oversampling Rate
– Bursted Serial Clock Providing up to 24 Bits
per Sample
Power Down Management
– ADC, DAC, CODEC, PGA, DSP
Analog & Digital Routing/Mixes
– Line/Headphone Out = Analog In (ADC
Bypassed)
– Line/Headphone Out = ADC Out
– Internal Digital Loopback
– Mono Mixes
I²C or SPI™ Control Port
I²S or Left-justified Digital Interface Format
Flexible Clocking Options
– Master or Slave Operation
– Wide Range of Sample Rates Supported
APPLICATIONS
HDD and Flash-based Portable Audio Players
PDAs
Personal Media Players
Portable Game Consoles
Digital Voice Recorders
MD Players/Recorders
Digital Camcorders
Digital Cameras
Smart Phones
GENERAL DESCRIPTION
CS42L56
The CS42L56 is a highly integrated, 24-bit, ultra-low-
power stereo CODEC based on multi-bit delta-sigma
modulation. Both the ADC and DAC offer many features
suitable for low power portable system applications.
The analog input path allows independent channel
control of a variety of features. The Programmable Gain
Amplifier (PGA) provides analog gain with zero cross
transitions. The ADC path includes a digital volume at-
tenuator with soft ramp transitions and a programmable
ALC and noise gate monitor the input signals and adjust
the volume appropriately. An analog passthrough also
exists, accommodating a lower noise, lower power ana-
log in to analog out path to the headphone and line
amplifiers, bypassing the ADC and DAC.
The DAC output path includes a fixed-function digital
signal processing engine. Tone control provides bass
and treble adjustment at four selectable corner frequen-
cies. The digital mixer provides independent volume
control for both the ADC output and PCM input signal
paths, as well as a master volume control. Digital vol-
ume controls may be configured to change on soft ramp
transitions while the analog controls can be configured
to occur on every zero crossing. The DAC path also in-
cludes de-emphasis, limiting functions and a beep
generator delivering tones selectable across a range of
two full octaves.
The Class H stereo headphone amplifier combines the
efficiency of an integrated step-down and inverting
charge pump with the linearity and low EMI of a Class
AB amplifier. A step-down/inverting charge pump oper-
ates in two modes: ±VCP mode or ±VCP/2) mode.
Based on the amplifier’s output signal, internal logic au-
tomatically adjusts the output of the charge pump,
+VHPFILT and –VHPFILT, to optimize efficiency. With
these features, the amplifier delivers a ground-centered
output with a large signal swing even at low voltages
and eliminates the need for external DC-blocking
capacitors.
These features make the CS42L56 the ideal solution for
portable applications which require extremely low pow-
er consumption in a minimal amount of space.
The CS42L56 is available in a 40-pin QFN package for
the Commercial (-40 to +85° C) grade. The CDB42L56
Customer Demonstration board is also available for de-
vice evaluation and implementation suggestions.
Please see “Ordering Information” on page 93 for com-
plete details.
2 DS851F2



Cirrus Logic CS42L56
CS42L56
TABLE OF CONTENTS
1. PIN DESCRIPTIONS .............................................................................................................................. 8
1.1 I/O Pin Characteristics .................................................................................................................... 10
2. TYPICAL CONNECTION DIAGRAMS ................................................................................................. 11
3. CHARACTERISTIC AND SPECIFICATION TABLES ......................................................................... 14
RECOMMENDED OPERATING CONDITIONS ................................................................................... 14
ABSOLUTE MAXIMUM RATINGS ....................................................................................................... 14
ANALOG INPUT CHARACTERISTICS ................................................................................................ 14
ADC DIGITAL FILTER CHARACTERISTICS ....................................................................................... 17
HP OUTPUT CHARACTERISTICS ...................................................................................................... 18
LINE OUTPUT CHARACTERISTICS ................................................................................................... 19
ANALOG PASSTHROUGH CHARACTERISTICS ............................................................................... 21
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...............................21
SWITCHING SPECIFICATIONS - SERIAL PORT ............................................................................... 22
SWITCHING SPECIFICATIONS - I²C CONTROL PORT ..................................................................... 23
SWITCHING CHARACTERISTICS - SPI CONTROL PORT ................................................................ 24
ANALOG OUTPUT ATTENUATION CHARACTERISTICS .................................................................. 25
DC CHARACTERISTICS ...................................................................................................................... 26
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ..................................................... 27
POWER CONSUMPTION - ALL SUPPLIES = 1.8 V ............................................................................ 28
POWER CONSUMPTION - ALL SUPPLIES = 2.5 V ........................................................................... 29
4. APPLICATIONS ................................................................................................................................... 30
4.1 Overview ......................................................................................................................................... 30
4.1.1 Basic Architecture ................................................................................................................. 30
4.1.2 Line Inputs ............................................................................................................................. 30
4.1.3 Line and Headphone Outputs (Class H, Ground-Centered Amplifiers) ................................. 30
4.1.4 Fixed-function DSP Engine ................................................................................................... 30
4.1.5 Beep Generator ..................................................................................................................... 30
4.1.6 Power Management .............................................................................................................. 30
4.2 Analog Inputs .................................................................................................................................. 31
4.2.1 Pseudo-differential Inputs ...................................................................................................... 32
4.2.2 Large-scale Inputs ................................................................................................................. 32
4.2.3 Microphone Inputs ................................................................................................................. 34
4.2.3.1 External Passive Components ................................................................................... 34
4.2.4 Optional VCM Buffer ............................................................................................................. 34
4.2.5 Automatic Level Control (ALC) .............................................................................................. 34
4.2.5.1 Attack/Release Time Calculations: ............................................................................ 36
4.3 Analog In to Analog Out Passthrough ............................................................................................ 36
4.4 Analog Outputs .............................................................................................................................. 37
4.5 Class H Amplifier ............................................................................................................................ 38
4.5.1 Power Control Options .......................................................................................................... 39
4.5.1.1 Standard Class AB Mode (setting 01 and 10) ........................................................... 39
4.5.1.2 Adapt to Volume Mode (setting 00) ........................................................................... 39
4.5.1.3 Adapt to Output Mode (setting 11) ............................................................................. 42
4.5.2 Power Supply Transitions ...................................................................................................... 42
4.5.3 Efficiency ............................................................................................................................... 43
4.6 Beep Generator .............................................................................................................................. 44
4.7 Limiter ............................................................................................................................................. 45
4.8 Serial Port Clocking ........................................................................................................................ 46
4.9 Digital Interface Format .................................................................................................................. 49
4.10 Initialization ................................................................................................................................... 49
4.11 Recommended DAC to HP or Line Power Sequence .................................................................. 49
4.11.1 Power-Up Sequence ........................................................................................................... 49
DS851F2
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