IS61DDB21M18A IS61DDB251236A
1Mx18, 512Kx36
18Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM
OCTOBER 2014
FEATURES
512Kx36 and 1Mx18 configuration available. On-chip delay-locked loop (DLL) for wide data valid
window. Common I/O read and write ports. Synchronous pipeline read with self-timed late write
operation. Double Data Rate (DDR) interface for re...
