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74LS256

Dual 4-Bit Addressable Latch

Description

54LS256 DM74LS256 Dual 4-Bit Addressable Latch June 1989 54LS256 DM74LS256 Dual 4-Bit Addressable Latch General Description The ’LS256 is a dual 4-bit addressable latch with common control inputs these include two Address inputs (A0 A1) an active LOW enable input (E) and an active LOW Clear input (CL) Each latch has a Data input (D) and four outputs (Q0 –...

National Semiconductor

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