PowerTrench SyncFET. FDMC2512SDC Datasheet

FDMC2512SDC Datasheet PDF, Equivalent


Part Number

FDMC2512SDC

Description

N-Channel Dual Cool PowerTrench SyncFET

Manufacture

Fairchild Semiconductor

Total Page 9 Pages
PDF Download
Download FDMC2512SDC Datasheet PDF


FDMC2512SDC Datasheet
FDMC2512SDC
N-Channel Dual CoolTM PowerTrench® SyncFETTM
25 V, 40 A, 2.0 mΩ
July 2010
Features
„ Dual CoolTM Top Side Cooling PQFN package
„ Max rDS(on) = 2.0 mΩ at VGS = 10 V, ID = 27 A
„ Max rDS(on) = 2.95 mΩ at VGS = 4.5 V, ID = 22 A
„ High performance technology for extremely low rDS(on)
„ SyncFET Schottky Body Diode
„ RoHS Compliant
General Description
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance. This device has the
added benefit of an efficient monolithic Schottky body diode.
Applications
„ Synchronous Rectifier for DC/DC Converters
„ Telecom Secondary Side Rectification
„ High End Server/Workstation Vcore Low Side
Pin 1
G
S
S
S
D5
D6
4G
3S
D
D
D
D
Top Power 33
Bottom
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
dv/dt
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous (Package limited)
-Continuous (Silicon limited)
-Continuous
-Pulsed
TC = 25 °C
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
D7
D8
(Note 4)
(Note 1a)
(Note 3)
(Note 5)
(Note 1a)
2S
1S
Ratings
25
±20
40
148
32
200
144
1.8
66
3.0
-55 to +150
Units
V
V
A
mJ
V/ns
W
°C
RθJC
RθJC
RθJA
RθJA
RθJA
RθJA
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Top Source)
(Bottom Drain)
(Note 1a)
(Note 1b)
(Note 1i)
(Note 1j)
(Note 1k)
4.5
1.9
42
105
17
26
12
°C/W
Device Marking
2512S
Device
FDMC2512SDC
©2010 Fairchild Semiconductor Corporation
FDMC2512SDC Rev.C2
Package
Dual CoolTM Power 33
1
Reel Size
13’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com

FDMC2512SDC Datasheet
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
ID = 1 mA, VGS = 0 V
ID = 10 mA, referenced to 25 °C
Zero Gate Voltage Drain Current
VDS = 20 V, VGS = 0 V
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 1 mA
ID = 10 mA, referenced to 25 °C
VGS = 10 V, ID = 27 A
VGS = 4.5 V, ID = 22 A
VGS = 10 V, ID = 27 A, TJ = 125 °C
VDD = 5 V, ID = 27 A
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 13 V, VGS = 0 V,
f = 1 MHz
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
VDD = 13 V, ID = 27 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V VDD = 13 V,
ID = 27 A
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 27 A
VGS = 0 V, IS = 2 A
(Note 2)
(Note 2)
IF = 27 A, di/dt = 300 A/μs
Min
25
1.2
Typ
21
1.7
-4
1.6
2.4
2.2
154
3315
1010
168
1.2
14
7
34
5
49
22
11
5.5
0.8
0.43
30
29
Max Units
V
mV/°C
500 μA
100 nA
2.5 V
mV/°C
2.0
2.95 mΩ
2.8
S
4410
1345
255
2.1
pF
pF
pF
Ω
26 ns
14 ns
55 ns
10 ns
68 nC
31 nC
nC
nC
1.2
V
0.8
48 ns
46 nC
©2010 Fairchild Semiconductor Corporation
FDMC2512SDC Rev.C2
2
www.fairchildsemi.com


Features Datasheet pdf FDMC2512SDC N-Channel Dual CoolTM PowerT rench® SyncFETTM FDMC2512SDC N-Channe l Dual CoolTM PowerTrench® SyncFETTM 2 5 V, 40 A, 2.0 mΩ July 2010 Features „ Dual CoolTM Top Side Cooling PQFN p ackage „ Max rDS(on) = 2.0 mΩ at VGS = 10 V, ID = 27 A „ Max rDS(on) = 2.95 mΩ at VGS = 4.5 V, ID = 22 A „ High performance technology for extremely lo w rDS(on) „ SyncFET Schottky Body Diod e „ RoHS Compliant General Descriptio n This N-Channel MOSFET is produced usi ng Fairchild Semiconductor’s advanced PowerTrench® process. Advancements in both silicon and Dual CoolTM package t echnologies have been combined to offer the lowest rDS(on) while maintaining e xcellent switching performance by extre mely low Junction-to-Ambient thermal re sistance. This device has the added ben efit of an efficient monolithic Schottk y body diode. Applications „ Synchrono us Rectifier for DC/DC Converters „ T elecom Secondary Side Rectification „ High End Server/Workstation Vcore Low Side Pin 1 G S S S .
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