9DB423B Datasheet PDF | IDT





9DB423B Datasheet PDF Download

Part Number 9DB423B
Description Four Output Differential Buffer
Manufacture IDT
Total Page 19 Pages
PDF Download Download 9DB423B Datasheet PDF

Features: DATASHEET Four Output Differential Buff er for PCIe Gen 1, Gen 2 and QPI 9DB42 3B Recommended Application: DB400Q com patible part with PCIe Gen1, Gen 2 and QPI support General Description: The IC S9DB423 is compatible with the Intel DB 400Q Differential Buffer Specification. This buffer provides 4 PCI-Express SRC or 4 QPI clocks. The ICS9DB423 is driv en by a differential output pair from a CK410B+ or CK509B main clock generator . Key Specifications • Output cycle-c ycle jitter < 50ps. • Output to Outpu t skew <50ps • Phase jitter: PCIe Gen 1 < 86ps peak to peak • Phase jitter: PCIe Gen2 < 3.0/3.1ps rms • Phase ji tter: QPI < 0.5ps rms • RoHS complian t packaging Features/Benefits • Spre ad spectrum modulation tolerant, 0 to - 0.5% down spread and +/- 0.25% center s pread. • Supports undriven differenti al outputs in Power Down and DIF_STOP# modes for power management. Output Feat ures • 4 - 0.7V current-mode differen tial output pairs • Supports zero delay buffer mode and fanou.

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9DB423B datasheet
DATASHEET
Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI
9DB423B
Recommended Application:
DB400Q compatible part with PCIe Gen1, Gen 2 and QPI
support
General Description:
The ICS9DB423 is compatible with the Intel DB400Q Differential
Buffer Specification. This buffer provides 4 PCI-Express SRC or
4 QPI clocks. The ICS9DB423 is driven by a differential output
pair from a CK410B+ or CK509B main clock generator.
Key Specifications
• Output cycle-cycle jitter < 50ps.
• Output to Output skew <50ps
• Phase jitter: PCIe Gen1 < 86ps peak to peak
• Phase jitter: PCIe Gen2 < 3.0/3.1ps rms
• Phase jitter: QPI < 0.5ps rms
• RoHS compliant packaging
Features/Benefits
• Spread spectrum modulation tolerant, 0 to -0.5% down
spread and +/- 0.25% center spread.
• Supports undriven differential outputs in Power Down and
DIF_STOP# modes for power management.
Output Features
• 4 - 0.7V current-mode differential output pairs
• Supports zero delay buffer mode and fanout mode
• Bandwidth programming available
• 50-133 MHz operation in PLL mode
• 33-400 MHz operation in Bypass mode
Funtional Block Diagram
OE(6,1)
2
SRC_IN
SRC_IN#
SPREAD
COMPATIBLE
PLL
4
M
U
STOP
X LOGIC
DIF(6,5,2,1)
PD
BYPASS#_133_100
HIGH_BW#
DIF_STOP#
SDATA
SCLK
CONTROL
LOGIC
IREF
Note: Polarities shown for OE_INV = 0.
IDT® Four Output Differential Buffer for PCIe and Gen 1, Gen 2 and QPI
1
1437B - 02/04/10

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