MOSFET. FDMS8090 Datasheet

FDMS8090 Datasheet PDF, Equivalent


Part Number

FDMS8090

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 8 Pages
PDF Download
Download FDMS8090 Datasheet PDF


FDMS8090 Datasheet
April 2013
FDMS8090
PowerTrench® Symmetrical Dual
100 V N-Channel MOSFET
Features
„ Max rDS(on) = 13 mΩ at VGS = 10 V, ID = 10 A
„ Max rDS(on) = 20 mΩ at VGS = 6 V, ID = 8 A
„ Low inductance packaging shortens rise/fall times, resulting in
lower switching losses
„ MOSFET integration enables optimum layout for lower circuit
inductance and reduced switch node ringing
„ 100% UIL tested
„ RoHS Compliant
General Description
This device includes two fast switching (Qgd minimized) 100V
N-Channel MOSFETs in a dual Power 56 (5 mm X 6 mm MLP)
package. The package is enhanced for exceptional thermal
performance.
Applications
„ Bridge Topologies
„ Synchronous Rectifier Pair
„ Motor Drives
Top
Pin 1
Bottom
S2 S2 S2 G2
D2
D1
Power 56
S1 S1 S1 G1 Pin 1
G1 1
S1 2
S1 3
S1 4
Contact to D1 Contact to D2
(backside) (backside)
Q1 Q2
8 G2
7 S2
6 S2
5 S2
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
100
±20
40
10
120
253
59
2.2
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
2.1
55
°C/W
Device Marking
FDMS8090
Device
FDMS8090
Package
Power 56
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
1
www.fairchildsemi.com

FDMS8090 Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
ID = 250 μA, referenced to 25 °C
VDS = 80 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
100 V
70 mV/°C
1
±100
μA
nA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
2.0 3.0 4.0
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
-10 mV/°C
VGS = 10 V, ID = 10 A
11 13
rDS(on)
Static Drain to Source On Resistance
VGS = 6 V, ID = 8 A
15 20 mΩ
VGS = 10 V, ID = 10 A, TJ = 125 °C
18 20
gFS Forward Transconductance
VDS = 10 V, ID = 10 A
24 S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 50 V, VGS = 0 V,
f = 1 MHz
1285 1800 pF
301 400
pF
16 28 pF
0.1 1.7 3.5
Ω
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = 50 V, ID = 10 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 5 V
VDD = 50 V,
ID = 10 A
10.6
4.6
17.4
4
19
10
6.1
4.1
21
10
31
10
27
15
ns
ns
ns
ns
nC
nC
nC
nC
Drain-Source Diode Characteristics
VSD
Source-Drain Diode Forward Voltage
VGS = 0 V, IS = 2 A
VGS = 0 V, IS = 10 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = 10 A, di/dt = 100 A/μs
0.7 1.2
0.8 1.3
V
49 78 ns
54 86 nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 55 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 138 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 253 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 13 A, VDD = 100 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 29 A.
4. Pulsed Id limited by junction temperature,td<=10uS. Please refer to SOA curve for more details.
©2012 Fairchild Semiconductor Corporation
FDMS8090 Rev.C1
2
www.fairchildsemi.com


Features Datasheet pdf FDMS8090 PowerTrench® Symmetrical Dual April 2013 FDMS8090 PowerTrench® Sym metrical Dual 100 V N-Channel MOSFET Fe atures „ Max rDS(on) = 13 mΩ at VGS = 10 V, ID = 10 A „ Max rDS(on) = 20 m at VGS = 6 V, ID = 8 A „ Low inducta nce packaging shortens rise/fall times, resulting in lower switching losses „ MOSFET integration enables optimum lay out for lower circuit inductance and re duced switch node ringing „ 100% UIL t ested „ RoHS Compliant General Descri ption This device includes two fast swi tching (Qgd minimized) 100V N-Channel M OSFETs in a dual Power 56 (5 mm X 6 mm MLP) package. The package is enhanced f or exceptional thermal performance. App lications „ Bridge Topologies „ Synch ronous Rectifier Pair „ Motor Drives Top Pin 1 Bottom S2 S2 S2 G2 D2 D1 Po wer 56 S1 S1 S1 G1 Pin 1 G1 1 S1 2 S1 3 S1 4 Contact to D1 Contact to D2 (b ackside) (backside) Q1 Q2 8 G2 7 S2 6 S2 5 S2 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS ID EAS PD TJ, TSTG .
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