MOSFET. FDMS8333L Datasheet

FDMS8333L Datasheet PDF, Equivalent


Part Number

FDMS8333L

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
PDF Download
Download FDMS8333L Datasheet PDF


FDMS8333L Datasheet
December 2014
FDMS8333L
N-Channel PowerTrench® MOSFET
40 V, 76 A, 3.1 mΩ
Features
„ Max rDS(on) = 3.1 mΩ at VGS = 10 V, ID = 22 A
„ Max rDS(on) = 4.3 mΩ at VGS = 4.5 V, ID = 19 A
„ Advanced Package and Silicon combination for low rDS(on)
and high efficiency
„ Next generation enhanced body diode technology,
engineered for soft recovery
„ MSL1 robust package design
„ 100% UIL tested
„ RoHS Compliant
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency and to minimize switch node
ringing of DC/DC converters using either synchronous or
conventional switching PWM controllers. It has been optimized
for low gate charge, low rDS(on), fast switching speed and body
diode reverse recovery performance.
Applications
„ OringFET / Load Switching
„ Synchronous rectification
„ DC-DC Conversion
Pin 1
Top
Bottom
Pin 1
S
S
S
G
Power 56
D
D
D
D
S
S
S
G
D
D
D
D
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 4)
(Note 3)
(Note 1a)
Ratings
40
±20
76
22
250
216
69
2.5
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
1.8
50
°C/W
Device Marking
FDMS8333L
Device
FDMS8333L
Package
Power 56
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C3
1
www.fairchildsemi.com

FDMS8333L Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = 250 μA, VGS = 0 V
40
V
ID = 250 μA, referenced to 25 °C
22 mV/°C
VDS = 32 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
1
±100
μA
nA
On Characteristics
VGS(th)
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
rDS(on)
Static Drain to Source On Resistance
gFS Forward Transconductance
VGS = VDS, ID = 250 μA
ID = 250 μA, referenced to 25 °C
VGS = 10 V, ID = 22 A
VGS = 4.5 V, ID = 19 A
VGS = 10 V, ID = 22 A, TJ = 125 °C
VDS = 5 V, ID = 22 A
1.0
1.8
-6
2.4
3.3
3.6
120
3.0 V
mV/°C
3.1
4.3 mΩ
4.7
S
Dynamic Characteristics
Ciss
Coss
Crss
Rg
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
VDS = 20 V, VGS = 0 V,
f = 1 MHz
3245 4545
pF
840 1175 pF
32 55 pF
0.1 0.7 2.1
Ω
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = 20 V, ID = 22 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V
VGS = 0 V to 4.5 V VDD = 20 V,
ID = 22 A
14 25 ns
4.7 10 ns
33 53 ns
4.2 10 ns
46 64 nC
22 31 nC
8.8 nC
5.5 nC
Drain-Source Diode Characteristics
VSD Source to Drain Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
VGS = 0 V, IS = 1.9 A
VGS = 0 V, IS = 22 A
(Note 2)
(Note 2)
IF = 22 A, di/dt = 100 A/μs
0.7 1.2
0.8 1.3
V
38 61 ns
20 32 nC
Notes:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 50 °C/W when mounted on a
1 in2 pad of 2 oz copper
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 216 mJ is based on starting TJ = 25 °C; N-ch: L = 3 mH, IAS = 12 A, VDD = 40 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 38 A.
4. Pulsed Id limited by junction temperature, td<=100 μS, please refer to SOA curve for more details.
©2013 Fairchild Semiconductor Corporation
FDMS8333L Rev. C3
2
www.fairchildsemi.com


Features Datasheet pdf FDMS8333L N-Channel PowerTrench® MOSFET December 2014 FDMS8333L N-Channel Po werTrench® MOSFET 40 V, 76 A, 3.1 mΩ Features „ Max rDS(on) = 3.1 mΩ at V GS = 10 V, ID = 22 A „ Max rDS(on) = 4 .3 mΩ at VGS = 4.5 V, ID = 19 A „ Adv anced Package and Silicon combination f or low rDS(on) and high efficiency „ N ext generation enhanced body diode tech nology, engineered for soft recovery „ MSL1 robust package design „ 100% UIL tested „ RoHS Compliant General Desc ription This N-Channel MOSFET has been designed specifically to improve the ov erall efficiency and to minimize switch node ringing of DC/DC converters using either synchronous or conventional swi tching PWM controllers. It has been opt imized for low gate charge, low rDS(on) , fast switching speed and body diode r everse recovery performance. Applicatio ns „ OringFET / Load Switching „ Sync hronous rectification „ DC-DC Conversi on Pin 1 Top Bottom Pin 1 S S S G Power 56 D D D D S S S G D D D D MOSFET Maximum Ratings TA.
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