MOSFET. FDMC612PZ Datasheet

FDMC612PZ Datasheet PDF, Equivalent


Part Number

FDMC612PZ

Description

MOSFET

Manufacture

Fairchild Semiconductor

Total Page 7 Pages
PDF Download
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FDMC612PZ Datasheet
FDMC612PZ
P-Channel PowerTrench® MOSFET
-20 V, -14 A, 8.4 mΩ
October 2013
Features
General Description
„ Max rDS(on) = 8.4 mΩ at VGS = -4.5 V, ID = -14 A
„ Max rDS(on) = 13 mΩ at VGS = -2.5 V, ID = -11 A
„ High performance trench technology for extremely low rDS(on)
„ High power and current handling capability in a widely used
surface mount package
„ Termination is Lead-free and RoHS Compliant
„ HBM ESD capability level > 3.6 KV typical (Note 4)
This P-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been optimized for rDS(ON), switching performance and
ruggedness.
Applications
„ Battery Management
„ Load Switch
8765
DD D D
S
D
SD
Pin 1
SD
1 234
Top
GS S S
Bottom
Pin 1
G
D
MLP 3.3x3.3
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
VGS
ID
EAS
PD
TJ, TSTG
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current -Continuous
-Continuous
-Pulsed
TC = 25 °C
TA = 25 °C
Single Pulse Avalanche Energy
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Operating and Storage Junction Temperature Range
Thermal Characteristics
(Note 1a)
(Note 3)
(Note 1a)
Ratings
-20
±12
-40
-14
-50
38
26
2.3
-55 to +150
Units
V
V
A
mJ
W
°C
RθJC
RθJA
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient
Package Marking and Ordering Information
(Note 1a)
4.9
53
°C/W
Device Marking
FDMC612PZ
Device
FDMC612PZ
Package
MLP 3.3X3.3
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
1
www.fairchildsemi.com

FDMC612PZ Datasheet
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
ΔBVDSS
ΔTJ
IDSS
IGSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
ID = -250 μA, VGS = 0 V
ID = -250 μA, referenced to 25 °C
VDS = -16 V, VGS = 0 V
VGS = ±12 V, VDS = 0 V
-20 V
-19 mV/°C
-1 μA
±10 μA
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
-0.6 -0.9 -1.5
V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 μA, referenced to 25 °C
9 mV/°C
VGS = -4.5 V, ID = -14 A
5.9 8.4
rDS(on)
Static Drain to Source On Resistance VGS = -2.5 V, ID = -11 A
8.2 13 mΩ
VGS = -4.5 V, ID = -14 A, TJ = 125 °C
8.3 13
gFS Forward Transconductance
VDS = -5 V, ID = -14 A
85 S
Dynamic Characteristics
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
5710
1215
1170
7995
1700
1640
pF
pF
pF
Switching Characteristics
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -14 A,
VGS = -4.5 V, RGEN = 6 Ω
VDD = -10 V, ID = -14 A,
VGS = -4.5 V
26 42 ns
52 83 ns
96 154 ns
81 130 ns
53 74 nC
9.4 nC
18 nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage VGS = 0 V, IS = -14 A
VGS = 0 V, IS = -2 A
(Note 2)
(Note 2)
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
IF = -14 A, di/dt = 100 A/μs
-0.8 -1.3
-0.7 -1.2
39 62
17 31
V
ns
nC
Notes:
1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined
by the user’s board design.
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
2: Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3: EAS of 38 mJ is based on starting TJ = 25 °C, L = 0.3 mH, IAS = -16 A, VDD = -18 V, VGS = -10 V.
4: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2013 Fairchild Semiconductor Corporation
FDMC612PZ Rev.C3
2
www.fairchildsemi.com


Features Datasheet pdf FDMC612PZ P-Channel PowerTrench® MOSFET FDMC612PZ P-Channel PowerTrench® MOS FET -20 V, -14 A, 8.4 mΩ October 2013 Features General Description „ Max rDS(on) = 8.4 mΩ at VGS = -4.5 V, ID = -14 A „ Max rDS(on) = 13 mΩ at VGS = -2.5 V, ID = -11 A „ High performanc e trench technology for extremely low r DS(on) „ High power and current handli ng capability in a widely used surface mount package „ Termination is Lead-fr ee and RoHS Compliant „ HBM ESD capabi lity level > 3.6 KV typical (Note 4) T his P-Channel MOSFET is produced using Fairchild Semiconductor’s advanced Po werTrench® process that has been optim ized for rDS(ON), switching performance and ruggedness. Applications „ Batter y Management „ Load Switch 8765 DD D D S D SD Pin 1 SD 1 234 Top GS S S Bottom Pin 1 G D MLP 3.3x3.3 M OSFET Maximum Ratings TA = 25 °C unles s otherwise noted Symbol VDS VGS ID EA S PD TJ, TSTG Parameter Drain to Sour ce Voltage Gate to Source Voltage Drain Current -Continuous -.
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