Random-Access Memory. CDP1822 Datasheet

CDP1822 Memory. Datasheet pdf. Equivalent


GE CDP1822
Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDP1822, CDP1822C
03
A2
AI
AD
A5
A6
A7
VSS
Dr I
001
012
22
2I
20
19
18
17
16
15
9 I.
10 13
" 12
TOP VIEW
Voo
O.
Riw
CSi
00
C52
DO.
014
003
DB
002
92CS-29976 RI
CDP1822, CDP1822C
TERMINAL ASSIGNMENTS
256-Word by 4-Bit LSI Static
Random-Access Memory
Features:
• Low operating current-8 mA at Voo=5 V
and cycle time=1 /is
• Industry standard pinout
• Two Chip-Select inputs-simple
memory expansion
• Memory retention for standby battery
voltage of 2 V min.
• Output-Disable for common I/O systems
• 3-state data output for bus-oriented
systems
• Separate data inputs and outputs
The RCA-CDP1822 and CDP1822C are 256-word by 4-blt
static random-access memories designed for use In memory
systems where high speed. low operating current. and
simplicity in use are desirable. The CDP1822 features high
speed and a wide operating voltage range. Both types have
separate data inputs and outputs and utilize single power
supplies of 4 to 6" volts for the CDP1822C and 4 to 10.5
volts for the CDP1822.
Two Chip-Select inputs are provided to simplify system
expansion. An Output Disable control provides Wire-OR
capability and is also useful in common Input/Output
systems. The Output Disable Input allows these RAMs to be
used in common data Input/Output systems by forcing the
output into a high-impedance state during a write operation
independent of the Chip-Select input condition. The output
assumes a high-impedance state when the Output Disable
is at high level or when the chip is deselected by CST and/or
CS2.
The high nOise immunity of the CMOS technology is
preserved in this design. For TTL interfacing at 5-V
operation. excellent system noise margin is preserved by
using an external pull-up resistor at each Input.
The CDP1822 and CDP1822C types are supplied in 22-lead
hermetic dual-in-line side-brazed ceramic packages (D
suffix). in 22-lead dual-in-line plastic packages (E suffix).
The CDP1822C is also available in chip form (H suffix).
OPERATIONAL MODES
MODE
Read
Write
Write
Standby
Standby
Output Disable
Chip Select 1
CS1
0
0
0
1
X
X
INPUTS
Chip Select 2 Output Disable
CS2 00
10
10
11
XX
0X
X1
Logic 1 =High Logic 0 =Low X =Don't Care
Read/Write
R/W
1
0
0
X
X
X
OUTPUT
Read
Data In
High Impedance
High Impedance
High Impedance
High Impedance
File Number 1074
654 _________________________________________________________


CDP1822 Datasheet
Recommendation CDP1822 Datasheet
Part CDP1822
Description 256-Word by 4-Bit LSI Static Random-Access Memory
Feature CDP1822; Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __ CDP1822, CDP1822C 03 A2 AI A.
Manufacture GE
Datasheet
Download CDP1822 Datasheet




GE CDP1822
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Random-Access Memories (RAMs)
CDP1822,CDP1822C
RECOMMENDED OPERATING CONDITIONS at TA = Full Package-Temperature Range
For maximum reliability, operating conditions should be selected so that operation is always
within the following ranges:
CHARACTERISTIC
DC Operating Voltage Range
Input Voltage Range
LIMITS
CDP1822
CDP1822C
Min. I Max.
4 I 10.5
Min. I Max.
4 I 6.5
Vss I Voo
Vss I Voo
UNITS
V
MAXIMUM RATINGS, Absolute-Maximum Values:
DC SUPPLY-VOLTAGE RANGE. (Voo)
(Voltage referenced to Vss Terminal)
CDP1822 .........................................................................................................-0.5 to +11 V
CDP1822C ........................................................................................................-0.5 to +7 V
INPUT VOLTAGE RANGE, ALL INPUTS .......................................................................... -0.5 to Voo +0.5 V
DC INPUT CURRENT, ANY ONE INPUT ................................................................................... ±10 mA
POWER DISSIPATION PER PACKAGE (Po)
ForT.=-40 to +60·C (PACKAGE TYPE E) ................................................................................ 500 mW
ForT.=+60 to +85·C (PACKAGE TYPE E) .................................................. Derate Linearly at 12 mWI"C to 200 mW
For T.=-55 to +100· C (PACKAGE TYPE D) ............................................................................... 500 mW
ForT.=+100 to +125·C (PACKAGE TYPE D) ............................................... Derate Linearly at 12 mWI"C to 200 mW
DEVICE DISSIPATION PER OUTPUT TRANSISTOR
FOR T.=FULL PACKAGE-TEMPERATURE RANGE (All Package Types) ................................................... 100 mW
OPERATING-TEMPERATURE RANGE (TA)
PACKAGE TYPE D ............................................................................................... -55 to +125·C
PACKAGE TYPE E ................................................................................................ -40 to +85·C
STORAGE TEMPERATURE RANGE (T...) .............................................................•............•• -65 to +150·C
LEAD TEMPERATURE (DURING SOLDERING)
At distance 1/16 ± 1/32 In (159 ± 0 79 mm) from case for 10 s max ...................................................... +265·C
STATIC ELECTRICAL CHARACTERISTICS at TA = -40 to +85·C, Except as Noted
CHARACTERISTIC
Quiescent DeVice
Current,
Output Voltage:
Low-Level,
High-Level,
100
VOL
VOH
Input Low Voltage,
Input High Voltage,
Output Low (Sink)
Current,
Output High (Source)
Current,
Input Current,
3-State Output
Leakage Current
Operating Current,
Input Capacitance,
Output Capacitance,
V,L
V,H
10L
10H
liN
lOUT
loo,t
C'N
COUT
TEST CONDITIONS
Vo VIN VDD
(V) (V) (V)
- 0.5 5
- 0, 10 10
- 0,5 5
- 0,10 10
-
-
0.5,4.5
0.5,9.5
0.5,4.5
0.5,9.5
0,5
0,10
-
-
-
-
5
10
5
10
5
10
0.4 0,5
5
0.5 0, 10 10
4.6 0, 5
5
9.5 0, 10 10
- 0,5 5
- 0, 10 10
0,5 0,5
5
0, 10 0, 10
- 0,5
- 0, 10
--
--
10
5
10
-
-
LIMITS
CDP1822
CDP1822C
Min. Typ.· Max. Min. Typ.· Max.
- - 500 - - 500
- - 1000 - - -
- 0 0.1 -
0 0.1
- 0 0.1 - - -
-4.9 5
4.9 5 -
9.9 10 - - - -
-- - 1.5 -
1.5
- - 3- - -
3.5 - - 3.5 - -
7- - - - -
2 4- 2 4-
-4.5 9 - - -
-1 -2 -
--1 -2
-2.2 -4.4
-
-
-
-
- - ±5 - - ±5
- - ±10 - - -
- - ±5 - - ±5
- - ±10 - - -
-- 4 8
48
- 8 16 - - -
- -5 7.5
5 7.5
- -10 15
10 15
UNITS
pA
V
rnA
pA
rnA
pF
tOutputs open circuited, cycle time = 1 p.s
"TYPical values are for TA = 25· C and nommal Voo
__________________________________________________________ 655



GE CDP1822
Random-Access Memories (RAMs) _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
CDP1822, CDP1822C
DYNAMIC ELECTRICAL CHARACTERISTICS at TA = -40 to +850 C, VDD ±5%,
Input tr,tf =20 ns, VIH =0.7 VDD, VIL =0.3 VDD, CL =100 pF
CHARACTERISTIC
Read Cycle Times (Fig. 1)
Read Cycle
tRC
Access from Address
tAA
Output Valid from
Chip-Select 1
Output Valid from
Chip-Select 2
Output Valid from
Output Disable
Output Hold from
(:;hip-Select 1
Output Hold from
Chip-Select 2
Output Hold from
Output Disable
tOOAl
tOOA2
tOOA3
tOOH1
tOOH2
tOOH3
,TEST CONDITIONS
VDD
CDP1822
,LIMITS
CDP1822C
'UNITS
(V) , Mln.T Typ." Max. , Mln.T Typ." , Max. ,
5
450 -
- 450 -
-
10 250 - - - - -
5
-
250 450
-
250 450
10
-
150 250
-
-
-
5
-
250 450
-
250 450
10
-
150 250
-
-
-
5
-
250 450
-
250 450
10
-
150 250
-
-
-
5
-
- 200 -
-
ns
200
10 - - 110 - - -
5 20 - - 20 - -
10 20 - - - - -
5 20 - - 20 - -
10 20 - - - - -
5 20 - - 20 - -
-10 20 - - -- -
tTime required by a limit device to allow for Indicated function
"TYPical values are for TA = 25' C and nominal Voo
AD - A 7
CHIP SELECT I
CHIP SELECT 2
OUTPUT DISABLE
READ/WRITE
DATA OUT
HIGH
1M P EDANCE
DATA CUT
~L=.:'.::.O_ _,../
HIGH
IMPEDANCE
Fig 1 - Read cycle tlmmg waveforms.
92CM- 302<l4R4
656 _______________________________________________________________







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