NMOS RAM. UPD4104-2 Datasheet

UPD4104-2 RAM. Datasheet pdf. Equivalent


NEC UPD4104-2
NEe Microcomputers, Inc.
NEe
p.PD4104
p.PD41 04·1
pPD41 04·2
4096 x 1 STATIC NMOS RAM
DEseR IPTION
The J.LPD4104 is a high performance 4K static RAM. Organized as 4096 x 1, it uses
a combination of static storage cells with dynamic input/output circuitry to achieve
high speed and low power in the same device. Utilizing NMOS technology, the
J.LPD4104 is fully TTL compatible and operates with a single +5V ± 10% supply.
FEATURES ' . FastAccessTime-200ns (J.LPD4104-2)
• Very Low Stand-By Power - 28 mW Max.
• Low VCC Data Retention Mode to +3 Volts.
• Single +5V ±10% Supply.
• Fully TTL Compatible.
• Available in 18 Pin Plastic and Ceramic Dual-in-Line Packages.
• '3 Performance Ranges:
II
jlPD4104
jlPD4104-1
jlPD4104-2
ACCESS TIME
300 ns
250 ns
200 ns
RIWCYCLE
4S0 ns
.386 ~s
310 ns
SU PPL Y CURRENT
ACTIVE STANDBY LOWVCC
21 mA
5mA
5mA
21 mA
6mA
3.3mA
25mA
6mA
3.3mA
A3
A2
A1
AO
A"
AlO
DOUT
WE
VSS
VCC
A5
A4
A7
AS
Ag
AS
DIN
CE
PIN NAMES
AO-A11
CE
Address Inputs
Chip Enable
DIN
DOUT
VSS
VCC
WE
Data Input
Data Output
Ground
Power (+5V)
Write Enable
Rev/2
53


UPD4104-2 Datasheet
Recommendation UPD4104-2 Datasheet
Part UPD4104-2
Description 4096 x 1 STATIC NMOS RAM
Feature UPD4104-2; NEe Microcomputers, Inc. NEe p.PD4104 p.PD41 04·1 pPD41 04·2 4096 x 1 STATIC NMOS RAM DEseR IPTIO.
Manufacture NEC
Datasheet
Download UPD4104-2 Datasheet




NEC UPD4104-2
,uPD4104
AO~-----------'
Al ROW
A2 DECODER
A3 AND
A4 BUFFER
A57L-----r----~
MEMORY
ARRAY
64 x 64
COLUMN
DECODER AND
DIN -ir--.L.---'_f-__'-'~ BUFFER
DOUT
Operating Temperature ................................ O·C to +70·C
Storage Temperature ................................-6S·C to +ISO·C
<DVoltage on Any Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1 to +7 Volts
Power Dissipation . . . . . . . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Watt
Short Circuit Output Current ................................. 50 mA
ABSOLUTE MAXIMUM
RATINGS*
CDNote: With respect to Vss
COMMENT: Stress above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is 8 stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affet.t device
reliability.
"Ta = 2S·C
PARAMETER
Supply Voltage
Logic "1" Voltage All Inputs
Logic "0" Voltage All Inputs
Average Vee
Power Supply
Current
L "PD41 04
I "PD4104-1
I "PD4104-2
Standby Vee Power Supply Current
Input Leakage Current (Any Input)
Output Leakage Current
Output Logic "1" Voltage lOUT -500 "A
Output Logic "0" Voltage lOUT 5mA
SYMBOL
VCC
VIH
VIL
ICCI
ICCI
ICCI
ICC2
IlL
IOL
VOH
VOL
LIMITS
MIN TYP MAX
4.5 5.0 5.5
2.2 -3 7.0
-1.0 0.8
21
21
25
5
-10 10
-10 10
2.4
0.4
UNIT
V
V
V
rnA
rnA
rnA
rnA
"A
~A
V
V
TEST
CONDITIONS
CD
0
W
~
@@
DC CHARACTERISTICS CD ®
PARAMETER
SYMBOL
LIMITS
MIN TYP MAX
UNIT
TEST CONDITIONS
CAPACITANCE CD
Input Capacitance
Output Capacitance
CIN
COUT
46
67
pF
pF
(J)
(J)
<DNotes:
All voltages referenced to VSS
@ ICCl is related to precharge and cycle times. Guaranteed maximum values for ICCl may
be calculated by
ICCI Irna 1- (Stp + 13 (te - tpl + 34201 tc
where tp and tc are expressed in nanoseconds. Equation is referenced to the -2 devlcsw
other devices derate to the same curve.
@ Output is disabled (open circuill, CE is at logic 1.
@ All device pins at 0 volts except pin under test at O. VIN = 5.5 volts.
@ OV .. VOUT .. +S.5V.
® CEDuring power UP. and We must be at VIH for minimum of 2 ms after Vec reaches
4.5V. before a valid memory cycle can be accomplished.
(i)
Effective capacitance calculated from the equation C
At
I 4V
with.6. V equal to 3V and
Vee nominal.
54



NEC UPD4104-2
AC CHARACTERISTICS @ Q)
STANDBY
CHARACTERISTICS
ILPD4104
PARAMETER
Read or Write Cycle Time
Random Access
Chip Enable Pulse Width
Chip Enable Precharge Time
Address Hold Time
Address Set-Up Time
Output Buffer Turn-Off Delay
Read Command Set·Up Time
Write Enable Set-Up Time
Data Input H0!!!Iime
Referenced to WE
Write Enabled Pulse Width
Modify Time
WE to CE Precharge Lead Time
Data Input Set-Up Time
Write Enable Hold Time
Transition Time
Read-Modify-Write Cycle Time
SYMBOL
tc
'AC
'CE
tp
'AH
'AS
tOFF
'AS
'w<
tOIH
'ww
tMOD
twPL
'OS
'WH
'T
tRMW
4104
MIN MAX
460
300
300 10,000
150
165
0
0 75
0
20
25
90
0 10,000
105
0
225
5 50
565
LIMITS
4104-1
4104-2
MIN MAX MIN MAX
385 310
250 200
250 10,000 200 10,000
125 100
135 110
00
0 65 0
50
00
-20 20
25 25
75 60
0 10,000 0
85 70
00
185 150
5 50 5
470 380
10,000
50
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
TEST
CONDITIONS
8
@
®
@)
4
ns
ns
ns 5
ns 6
ns
ns
ns
ns @
II
Notes: Q) All voltages referenced to VSS
@ During power uP. CE and WE must be at VIH for minimum of 2 ms after Vee reaches 4.5V, before a valid
memory cycle can be accomplished.
@) Measured with load circuit equivalent to 2 TTL loads and CL '" 100 pF.
@ If WE follows CE by more than tws then data out may not remain open circuited.
@ Determined by user. Total cycle time cannot exceed tCE max.
@ Data-in set-up time is referenced to the later of the two falling clock edges CE or WE.
e]) ~C measurements assume tT '" 5 ns. Timing points are taken as VIL = O.BV and VIH '" 2.2V on the inputs
and VOL" O.4V and VOH '" 2.4V on the output waveform.
@ tc" teE + tp + 2 tT.
@ The true level of the output in the open circuit condition will be determined totally by output load
conditions. The output is guaranteed to be open circuit within tOFF.
@ tRMW " tAC + tWPL + tp + 3 tT + tMOO·
I
PARAMETER
VCC In Standby
Standby Current
Power Supply Fall Time
Power Supply Rise Time
Chip Enable Pulse CE Width
Chip Enable Precharge to
Power Down Time
"'" Level CE Min Level
Standby Recovery Time
SYMBOL
VPD
IPD
TF
TA
TCE
TPPD
V,H
TAC
4104
MIN MAX
3.0
5.0
lDO
100
300
LIMITS
4104-1
4104-2
MIN MAX MIN MAX
3.0 3.0
3.3 3.3
100 100
100 100
250 200
UNIT
V
rnA
~s
~s
~s
150 125
100 ns
2.2
500
2.2
500
2.2
500
V
~s
TEST
CONDITIONS
<DNote: Maximum value for V PD minimum value (= 3 V).
TIMING WAVEFORMS
POWER DOWN
STANDBY MODE
55





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