AND DRIVER. UPB8284 Datasheet

UPB8284 DRIVER. Datasheet pdf. Equivalent

UPB8284 Datasheet
Recommendation UPB8284 Datasheet
Part UPB8284
Description CLOCK GENERATOR AND DRIVER
Feature UPB8284; NEe Microcomputers, Inc. CLOCK GENERATOR AND DRIVER FOR 8086/8088 MICROPROCESSORS N'EC !J.PB8284 D.
Manufacture NEC
Datasheet
Download UPB8284 Datasheet




NEC UPB8284
NEe Microcomputers, Inc.
CLOCK GENERATOR AND DRIVER FOR
8086/8088 MICROPROCESSORS
N'EC
!J.PB8284
DESCR IPTION
The j.lPBB284 is a clock generator and driver for the B086 and 8088 microprocessors
This bipolar driver provides the microprocessor with a reset signal and also provides
properly synchronized READY timing. A TTL clock is also provided for peripheral
devices.
FEATU RES
Generate System Clock for the 8086 and 8088
• Frequency Source can be a Crystal or a TTL Signal
• MOS Level Output for the Processor
• TTL Level Output for Peripheral Devices
• Power-Up Reset for the Processor
• READY Synchronization
• +5V Supply
• 18 Pin Package
PIN CONFIGURATION
CYSNC
PCLK
AENi'
RDY1
RDY2
AEiii2
CLK
GND
PIN NAMES
VCC
X1
X2
TNK
EFI
Fie
OSC
REs
RESET
X1. X2
TANK
FIC
EFI
CSYNC
RDY1}
RDY2
~}
AEN2
RES
RESET
OSC
CLK
PCLK
READY
Crystal Connections
For Overtone Crystal
Clock Source Select
External Clock Input
Clock Synchronization Input
Ready Signal from
Multibus™* Systems
Address Enable Qualifiers
for the two R DY Signals
Reset Input
Synchronized Reset Output
Oscillator Output
MOS Clock for the Processor
TTL Clock for Peripherals
Synchronized Ready Output
*TM - Multibus is a trademark of Intel Corporation.
II
673



NEC UPB8284
II-PB8284
PIN IDENTIFICATION
NO. SYMBOL
NAME
FUNCTION
1
2
3, 7
4,6
5
8
10
11
12
13
14
16, 17
15
18
CSYNC
Clock Synchronization
PClK
Peripheral Clock
AEN1,AEN2 Address Enable
RDY1, RDY2 Bus Ready
READY
Ready
ClK
Processor Clock
RESET
Reset
RES Reset In
OSC Oscillator Output
F/C Frequency Crystal Select
EFI
Xl. X2
External Frequency In
Crystal In
TNK
VCC
Tank
VCC
An active high signal which allows
multiple 8284s to be synchronized.
When CYSNC is low, the internal
counters count and when high the
counters are reset. CYSNC should
be grounded when the internal
oscillator is used.
A TTL level clock for use with per-
ipheral devices. This clock is one-
half the frequency of ClK.
This active low signal is used to
qualify its respective RDY inputs.
If there is only one bus to interface
to, AEN inputs are to be grounded.
This signal is sent to the 8284 from
a peripheral device on the bus to
indicate that data has been received
or data is available to be read.
The READY signal to the micro-
processor is sy'nchronized by the
RDY inputs to the processor ClK.
READY is cleared after the guaran-
teed hold time to the processor has
been met.
This is the MOS level clock output
of 33% duty cycle to drive the
microprocessor and bipolar support
devices (8288) connected to the
processor. The frequency of ClK is
one th ird of the crystal or EFI
frequency.
This is used to initialize the proces-
sor. Its input is derived from an RC
connection to a Schmitt trigger
input for power up operation.
This Schmitt trigger input is used to
determine the timing of RESET out
via an RC circuit.
This TTL level clock is the output
of the oscillator circuit running at
the crystal frequency.
F/C is a strapping option used to
.determine where ClK is generated.
A low is for the EFI input, and a
high is for the crystal.
A square wave in at three times the
ClK output. A TTL level clock to
generate ClK.
A crystal is connected to these
inputs to generate the processor
clock_ The crystal chosen is three
times the. desired ClK output.
Th is -is used for overtone type
crystals. (See diagram below.)
+5V
PIN IDENTIFICATION
674



NEC UPB8284
~,PB8284
BLOCK DIAGRAM
rn--------------------------~
x,------i
x,------i
1------.-----------1 ~>o_--------I_--------- osc
F/O'-__. _ - I ~>o-----------_l~1I:
EF'---=========:[y.
~YNC------------------------------------~----~----~
1-------00_ READY
ABSOLUTE MAXIMUM
RATINGS*
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . O°C to 70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . , . . . . -65°C to +150oC
All Output and Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . -O.5V to +7V
All Input Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1.0V to +5.5V
COMMENT: Stress above those listed under "Absolute Maximum Ratings" may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or
other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
*Ta = 25°C
DC CHARACTERISTICS
Conditions: Ta = O°C to 70D C; VCC = 5V ± 10%
PARAMETER
TEST
SYMBOL MIN MAX UNIT CONDITIONS
Forward Input Current
Reverse Input Current
Input Forward Clamp Voltage
Power Supply Current
Input low Voltage
Input High Voltage
Reset Input High Voltage
Output low Voltage
Output High Voltage ClK
Other Outputs
RES Input Hysteresis
IF
IR
Vc
ICC
VIL
VIH
VIHR
2.0
2.6
VOL
VOH
4
2.4
VIHR,VllR 0.25
-0.5
50
-1.0
140
0.8
0.45
mA
JJ.A
'V
rnA
V
V
V
V
V
V
V
VF = 0.45V
VR = 5.25V
IC=-5 mA
VCC= 5.0V
VCC= 5.0V
VCC = 5.0V
5 rnA =IOl
-1 rnA}
-1 rnA IOH
VCC= 5.0V
675







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