Receive Mixer. ADRF6612 Datasheet

ADRF6612 Mixer. Datasheet pdf. Equivalent

ADRF6612 Datasheet
Recommendation ADRF6612 Datasheet
Part ADRF6612
Description 700 MHz to 3000 MHz Dual Passive Receive Mixer
Feature ADRF6612; Data Sheet 700 MHz to 3000 MHz Dual Passive Receive Mixer with Integrated PLL and VCO ADRF6612 FEA.
Manufacture Analog Devices
Datasheet
Download ADRF6612 Datasheet




Analog Devices ADRF6612
Data Sheet
700 MHz to 3000 MHz Dual Passive
Receive Mixer with Integrated PLL and VCO
ADRF6612
FEATURES
RF frequency: 700 MHz to 3000 MHz, continuous
LO input frequency: 200 MHz to 2700 MHz, high-side or low-
side injection
IF range: 40 MHz to 500 MHz
Power conversion gain of 9.0 dB
Single sideband (SSB) noise figure of 11.3 dB
Input IP3 of 30 dBm
Input P1dB of 10.6 dBm
Typical LO input drive of 0 dBm
Single-ended, 50 Ω RF port
Single-ended or balanced LO input port
Serial port interface (SPI) control on all functions
Exposed pad, 7 mm × 7 mm, 48-lead LFCSP
APPLICATIONS
Multiband/multistandard cellular base station diversity
receivers
Wideband radio link diversity downconverters
Multimode cellular extenders and picocells
FUNCTIONAL BLOCK DIAGRAM
GND 1
2 46
GND 3
VCO
GND 6
VCC1 7 VCO
45 44 48 47 43 42
39 38
PLL REF BUFFER
PFD/CP
FRACTIONAL DIVIDER
VCO
EXTVCOIN+ 4
EXTVCOIN– 5
DECL1 8
DECL2 9
DECL3 10
DECL4 11
DECL5 12
VCO
LDO
SPI
2.5V
LDO
÷1 TO
32
ADRF6612
PLL
3.3V
LDO
DIV
3.3V
LDO
SPI
CONTROL
13 14 15 16 17 18 19
22 23
41 40 37
34 VCC10
33 VCC9
32 VCC8
36 RFBCT1
35 RFIN1
31 VCC7
30 LDO2
26 RFIN2
25 RFBCT2
29 VCC6
28 VCC5
27 VCC4
20 21 24
Figure 1.
GENERAL DESCRIPTION
The ADRF6612 is a dual radio frequency (RF) mixer and
intermediate frequency (IF) amplifier with an integrated phase-
locked loop (PLL) and voltage controlled oscillators (VCOs). The
ADRF6612 uses revolutionary broadband square wave limiting
local oscillator (LO) amplifiers to achieve an unprecedented RF
bandwidth of 700 MHz to 3000 MHz. Unlike narrow-band sine
wave LO amplifier solutions, the LO can be applied above or
below the RF input over an extremely wide bandwidth. Energy
storage elements are not utilized in the LO amplifier, thus dc
current consumption also decreases with decreasing LO
frequency.
The ADRF6612 utilizes highly linear, doubly balanced passive
mixer cores with integrated RF and LO balancing circuits to
allow single-ended operation. Integrated RF baluns allow optimal
performance over the 700 MHz to 3000 MHz RF input frequency.
The balanced passive mixer arrangement provides outstanding
LO to RF and LO to IF leakages, excellent RF to IF isolation,
and excellent intermodulation performance over the full RF
bandwidth.
The balanced mixer cores provide extremely high input
linearity, allowing the device to be used in demanding
Rev. A
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wideband applications where in band blocking signals may
otherwise result in the degradation of dynamic range. Noise
performance under blocking is comparable to narrow-band
passive mixer designs. High linearity IF buffer amplifiers follow the
passive mixer cores, yielding typical power conversion gains of
9 dB, and can be matched to a wide range of output impedances.
The PLL architecture supports both integer-N and fractional-N
operation and can generate the entire LO frequency range of
200 MHz to 2700 MHz using an external reference input
frequency anywhere in the range of 12 MHz to 320 MHz. An
external loop filter provides flexibility in trading off phase noise
vs. acquisition time. To reduce fractional spurs in fractional-N
mode, a sigma-delta (Σ-Δ) modulator controls the post-VCO
programmable divider. The VCO consists of multiple VCO cores.
All features of the ADRF6612 are controlled via a 3-wire SPI
resulting in optimum performance and minimum external
components.
The ADRF6612 is fabricated using a BiCMOS, high performance
IC process. The device is available in a 7 mm × 7 mm, 48-lead
LFCSP package and operates over a −40°C to +85°C temperature
range. An evaluation board is available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2014–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com



Analog Devices ADRF6612
ADRF6612* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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EVALUATION KITS
ADRF6612 Evaluation Board
DOCUMENTATION
Data Sheet
ADRF6612: 700 MHz to 3000MHz Dual Passive Receive
Mixer with Integrated PLL and VCO Data Sheet
User Guides
UG-968: Evaluating the ADRF6612/ADRF6614, 700 MHz to
3000 MHz Rx Dual Mixer with Integrated Fractional-N PLL
and VCO
REFERENCE MATERIALS
Press
Analog Devices Introduces High-Performance RF ICs for
Multi-band Base Stations and Microwave Point-to-Point
Radios
DESIGN RESOURCES
ADRF6612 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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Analog Devices ADRF6612
ADRF6612
TABLE OF CONTENTS
Features .............................................................................................. 1 
Applications....................................................................................... 1 
Functional Block Diagram .............................................................. 1 
General Description ......................................................................... 1 
Revision History ............................................................................... 2 
Specifications..................................................................................... 3 
RF Specifications .......................................................................... 3 
Synthesizer/PLL Specifications................................................... 4 
VCO Specifications, Open-Loop................................................ 7 
Logic Input and Power Specifications ....................................... 8 
Digital Logic Specifications......................................................... 9 
Absolute Maximum Ratings.......................................................... 10 
Thermal Resistance .................................................................... 10 
ESD Caution................................................................................ 10 
Pin Configuration and Function Descriptions........................... 11 
Typical Performance Characteristics ........................................... 13 
Mixer, High Performance Mode............................................... 13 
Mixer, High Efficiency Mode.................................................... 22 
Synthesizer................................................................................... 23 
REVISION HISTORY
5/2016—Rev. 0 to Rev. A
Changes to Table 19........................................................................ 32
Changes to Address: 0x22, Reset: 0x000A, Name: VCO_CTRL1
Section and Table 34....................................................................... 45
Updated Outline Dimensions ....................................................... 57
Changes to Ordering Guide .......................................................... 57
12/2014—Revision 0: Initial Version
Data Sheet
Spurious Performance ............................................................... 29 
Circuit Description......................................................................... 31 
RF Subsystem.............................................................................. 31 
External LO Generation ............................................................ 31 
Internal LO Generation ............................................................. 31 
Applications Information .............................................................. 35 
Basic Connections Pin Description ............................................. 36 
Mixer Optimization ....................................................................... 37 
RF Input Balun Insertion Loss Optimization......................... 37 
IIP3 Optimization ...................................................................... 37 
VGS Programming..................................................................... 38 
Low-Pass Filter Programming.................................................. 38 
Register Summary .......................................................................... 40 
Register Details ............................................................................... 41 
Evaluation Board ............................................................................ 52 
Outline Dimensions ....................................................................... 57 
Ordering Guide .......................................................................... 57 
Rev. A | Page 2 of 57







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