Clock Generator. CY2213 Datasheet

CY2213 Generator. Datasheet pdf. Equivalent

CY2213 Datasheet
Recommendation CY2213 Datasheet
Part CY2213
Description High Frequency Programmable PECL Clock Generator
Feature CY2213; High Frequency Programmable PECL Clock Generator Features ■ Jitter peak-peak (Typical) = 35 ps ■ LVP.
Manufacture Cypress Semiconductor
Datasheet
Download CY2213 Datasheet




Cypress Semiconductor CY2213
High Frequency Programmable PECL Clock Generator
Features
Jitter peak-peak (Typical) = 35 ps
LVPECL output
Default Select option
Serially configurable multiply ratios
Output edge rate control
16-pin TSSOP
High frequency
3.3 V operation
Logic Block Diagram
XIN
XOUT
OE
S
SER CLK
SER DATA
Xtal
Oscillator
CY2213
High Frequency Programmable PECL
Clock Generator
Benefits
High accuracy clock generation
One pair of differential output drivers
Phase-locked loop (PLL) multiplier select
8-bit feedback counter and 6-bit reference counter for high
accuracy
Minimize electromagnetic interference (EMI)
Industry standard, low cost package saves on board space
For a complete list of related documentation, click here.
PLL CLK
xM CLKB
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-07263 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised August 18, 2015



Cypress Semiconductor CY2213
CY2213
Contents
Pinouts .............................................................................. 3
Pin Definitions .................................................................. 3
Frequency Table ............................................................... 3
CY2213 Two-Wire Serial Interface ................................... 4
Introduction .................................................................. 4
Serial Interface Specifications ..................................... 4
Serial Interface Format ................................................ 4
Serial Interface Transfer Format ................................. 4
Absolute Maximum Conditions ....................................... 6
Crystal Requirements ...................................................... 6
Electrical Characteristics ................................................. 6
DC Electrical Specifications ........................................ 6
3.3 V DC Device Characteristics ................................. 6
AC Electrical Specifications ......................................... 7
AC Device Characteristics ........................................... 7
State Transition Characteristics .................................. 8
Functional Specifications ................................................ 8
Crystal Input ................................................................ 8
Select Input ................................................................. 8
PECL Clock Output Driver ........................................... 8
Signal Waveforms ....................................................... 9
Jitter ........................................................................... 10
Ordering Information ...................................................... 12
Ordering Code Definitions ......................................... 12
Package Diagrams .......................................................... 13
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC Solutions ......................................................... 16
Document Number: 38-07263 Rev. *J
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Cypress Semiconductor CY2213
CY2213
Pinouts
Figure 1. 16-pin TSSOP pinout
CY2213
VDDX
VSSX
XOUT
XIN
VDD
OE
VSS
SER CLK
1
2
3
4
5
6
7
8
16 S
15 VDD
14 VSS
13 CLK
12 CLKB
11 VSS
10 VDD
9 SER DATA
Pin Definitions
Pin Name
VDDX
VSSX
XOUT
XIN
VDD
OE
VSS
SER CLK
SER DATA
VDD
VSS
CLKB
CLK
VSS
VDD
S
Pin Number
Pin Description
1 3.3 V Power Supply for Crystal Driver
2 Ground for Crystal Driver
3 Reference Crystal Feedback
4 Reference Crystal Input
5 3.3 V Power Supply (all VDD pins must be tied directly on board)
6 Output Enable, 0 = output disable, 1 = output enable (no internal pull up)
7 Ground
8 Serial Interface Clock
9 Serial Interface Data
10 3.3 V Power Supply (all VDD pins must be tied directly on board)
11 Ground
12 LVPECL Output Clock (complement)
13 LVPECL Output Clock
14 Ground
15 3.3 V Power Supply (all VDD pins must be tied directly on board)
16 PLL Multiplier Select Input, Pull up Resistor Internal
Frequency Table
S M (PLL Multiplier)
0 × 16
1 ×8
Example Input Crystal Frequency
25 MHz
15.625 MHz
CLK, CLKB
400 MHz
125 MHz
Document Number: 38-07263 Rev. *J
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