GaAs MMIC. NJG1650HB6 Datasheet

NJG1650HB6 MMIC. Datasheet pdf. Equivalent

NJG1650HB6 Datasheet
Recommendation NJG1650HB6 Datasheet
Part NJG1650HB6
Description SP3T SWITCH GaAs MMIC
Feature NJG1650HB6; NJG1650HB6 SP3T SWITCH GaAs MMIC I GENERAL DESCRIPTION NJG1650HB6 is a SP3T switch IC featured low.
Manufacture New Japan Radio
Datasheet
Download NJG1650HB6 Datasheet




New Japan Radio NJG1650HB6
NJG1650HB6
SP3T SWITCH GaAs MMIC
I GENERAL DESCRIPTION
NJG1650HB6 is a SP3T switch IC featured low insertion loss, high
isolation and small size package.
This switch is suitable for W-LAN, Bluetooth, and sub-microwave
applications.
A small and thin package of USB8-B6 is adopted.
I APPLICATIONS
LTE and 3G applications
WLAN and Blue-tooth applications
Receive system, RX path, and Diversity antenna applications
Mobile phone, Tablet PC, Data card, Modem and Router applications
I PACKAGE OUTLINE
NJG1650HB6
I FEATURES
G Control voltage range
G Low insertion loss
G High isolation
G Input power at 0.2dB compression point
G Low current consumption
G Small & thin package
+2.0~+5.0V
0.38dB typ. @f=1.0GHz, PIN=23dBm, VCTL(H)=2.7V
0.42dB typ. @f=2.0GHz, PIN=23dBm, VCTL(H)=2.7V
0.45dB typ. @f=2.5GHz. PIN=23dBm, VCTL(H)=2.7V
21dB typ. @f=2.5GHz, PIN=23dBm, VCTL(H)=2.7V
28dBm typ. @f=2.5GHz, VCTL(H)=2.7V
5µA typ. @ VCTL(H)=2.7V
USB8-B6 (package Size: 1.5 x 1.5 x 0.55mm typ.)
I PIN CONFIGURATION
USB8-B6 Type
(Top view)
8
17
26
35
4
Pin connection
1. VCTL3
2. P3
3. GND
4. P2
5. VCTL2
6. P1
7. VCTL1
8. PC
I TRUTH TABLE
VCTL1
H
L
L
“H”=VCTL(H), “L”=VCTL(L)
VCTL2
VCTL3
LL
HL
LH
PATH
PC-P1
PC-P2
PC-P3
NOTE: The information on this datasheet is subject to change without notice.
Ver.2013-05-09
-1-



New Japan Radio NJG1650HB6
NJG1650HB6
I ABSOLUTE MAXIMUM RATINGS
PARAMETERS
Input Power
Control Voltage
Power Dissipation
Operating Temp.
Storage Temp.
SYMBOL
PIN
VCTL
PD
Topr
Tstg
CONDITIONS
VCTL(H)=2.7V
On PCB Board
(Ta=+25°C, Zs=Zl=50)
RATINGS
UNITS
30 dBm
6.0 V
150 mW
-40~+85
°C
-55~+150
°C
I ELECTRICAL CHARACTERISTICS
(VCTL(L)=0V, VCTL(H)=2.7V, ZS=Zl=50, Ta=+25°C, with application circuit)
PARAMETERS
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Control voltage(LOW)
VCTL(L)
-0.2
-
+0.2
V
Control voltage (HIGH)
VCTL(H)
2.0 2.7 5.0
V
Control current
ICTL
- 5 10 µA
Insertion Loss 1
LOSS1 f=1.0GHz, PIN=23dBm
- 0.38 0.55 dB
Insertion Loss 2
LOSS2 f=2.0GHz, PIN=23dBm
- 0.42 0.60 dB
Insertion Loss 3
LOSS3 f=2.5GHz, PIN=23dBm
- 0.45 0.60 dB
Isolation 1
ISL1 f=1.0GHz, PIN=23dBm 27 29 - dB
Isolation 2
ISL2 f=2.0GHz, PIN=23dBm 21 23 - dB
Isolation 3
Input power at 0.2dB
compression point
VSWR (PC, P1, P2, P3)
ISL3
P-0.2dB
VSWR
f=2.5GHz, PIN=23dBm
f=2.5GHz
f=2.5GHz, On state
19 21 - dB
25 28
- dBm
- 1.1 1.3
Switching time
TSW 50% CTL to 10/90% RF - 150 500 ns
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New Japan Radio NJG1650HB6
I TERMINAL INFORMATION
NJG1650HB6
No. SYMBOL
DESCRIPTION
Control port. This port is set to VCTL(H) (+2.0~+5.0V) or VCTL(L)
(-0.2~+0.2V). For good RF performance, please place a bypass capacitor
1 VCTL3 between this port and GND, close to this port. Please choose optimum
capacitance value from 10pF to 1000pF because this capacitor
influences a switching time.
RF port. This port is connected to PC port by control voltage of VCTL(H) at
2 P3 1st pin, VCTL(L) at 5th and 7th pins. In order to block DC bias voltage of
internal circuit, an external capacitor is required.
3
GND
Ground terminal. Please connect this terminal with ground plane as close
as possible for good RF performance.
RF port. This port is connected to PC port by control voltage of VCTL(H) at
4 P2 5th pin, VCTL(L) at 1st and 7th pins. In order to block DC bias voltage of
internal circuit, an external capacitor is required.
Control port. This port is set to VCTL(H) (+2.0~+5.0V) or VCTL(L)
(-0.2~+0.2V). For good RF performance, please place a bypass capacitor
5 VCTL2 between this port and GND, close to this port. Please choose optimum
capacitance value from 10pF to 1000pF because this capacitor
influences a switching time.
RF port. This port is connected to PC port by control voltage of VCTL(H) at
6 P1 7th pin, VCTL(L) at 1st and 5th pins. In order to block DC bias voltage of
internal circuit, an external capacitor is required.
Control port. This port is set to VCTL(H) (+2.0~+5.0V) or VCTL(L)
(-0.2~+0.2V). For good RF performance, please place a bypass capacitor
7 VCTL1 between this port and GND, close to this port. Please choose optimum
capacitance value from 10pF to 1000pF because this capacitor
influences a switching time.
Common RF port. This PC port is connected with either of P1, P2 and P3
8 PC by logical control voltage of VCTL1 to 3. In order to block DC bias voltage
of internal circuit, an external capacitor is required.
-3-







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