Signal Processor. ADDI7018 Datasheet

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ADDI7018 Datasheet
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Part ADDI7018
Description 16-Bit HD Image Signal Processor
Feature ADDI7018; Data Sheet Dual-Channel, 16-Bit HD Image Signal Processor with Precision Timing Core ADDI7018 FEAT.
Manufacture Analog Devices
Datasheet
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Analog Devices ADDI7018
Data Sheet
Dual-Channel, 16-Bit HD Image Signal
Processor with Precision Timing Core
ADDI7018
FEATURES
Pin-compatible with the AD9978A
Dual AFE channels
1.8 V analog and digital core supply voltage
Serial data output with reduced range LVDS outputs
Differential analog inputs
CDS or SHA configuration (CDS bypass) with
−3 dB, 0 dB, +3 dB, and +6 dB gain
6 dB to 42 dB, 10-bit variable gain amplifier (VGA)
16-bit, 75 MHz analog-to-digital converter (ADC)
Black level clamp with variable level control
Precision Timing core with 210 ps resolution at 75 MHz
APPLICATIONS
HD broadcast cameras
High speed industrial cameras
Professional digital cameras
Digital copiers
GENERAL DESCRIPTION
The ADDI7018 is a highly integrated, dual-channel, charge-
coupled device (CCD) signal processor for high speed digital
video camera applications. Each channel is specified at pixel
rates of up to 75 MHz and consists of a complete analog front
end (AFE) with ADC conversion. The Precision Timing® core
allows adjustment of the correlated double sampler (CDS) and
sample-and-hold amplifier (SHA) clocks with 210 ps resolution
at 75 MHz operation. The ADDI7018 also contains a reduced
range low voltage differential signaling (LVDS) interface for the
dual-channel data outputs.
Each analog front end includes black level clamping, a CDS, a
VGA, and a 75 MHz, 16-bit analog-to-digital converter (ADC).
Operation is programmed using a 3-wire serial interface.
Packaged in a space-saving, 6 mm × 6 mm, 40-lead LFCSP, the
ADDI7018 is specified over an operating temperature range of
−25°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
ADDI7018
INP_A
INM_A
INP_B
INM_B
CDS/
SHA
6dB TO 42dB
VGA
–3dB, 0dB, +3dB, +6dB
–3dB, 0dB, +3dB, +6dB
6dB TO 42dB
CDS/
SHA
VGA
VREF
ADC
CLAMP
CLAMP
ADC
LVDS
SERIALIZER
INTERNAL CLOCKS
CLK_OUT
Precision
Timing
CORE
SYNC
GENERATOR
INTERNAL
REGISTERS
DOUT0P
DOUT0N
DOUT1P
DOUT1N
TCLKP
TCLKN
DOUT2P
DOUT2N
DOUT3P
DOUT3N
CLI
HD VD
Figure 1.
SL SDATA SCK
For more information about the ADDI7018, email Analog Devices, Inc., at afe.ccd@analog.
Rev. Sp0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.



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DOCUMENTATION
Data Sheet
ADDI7018: Dual-Channel, 16-Bit HD Image Signal
Processor with Precision Timing Core Data Sheet
DESIGN RESOURCES
ADDI7018 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
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Analog Devices ADDI7018
ADDI7018
NOTES
Data Sheet
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10868F-0-8/12(Sp0)
Rev. Sp0 | Page 2 of 2







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