MirrorBit Flash. S70GL02GP Datasheet

S70GL02GP Flash. Datasheet pdf. Equivalent

S70GL02GP Datasheet
Recommendation S70GL02GP Datasheet
Part S70GL02GP
Description 2 Gbit / 3V Page Mode S70GL-P MirrorBit Flash
Feature S70GL02GP; S70GL02GP 2 Gbit, 3V Page Mode S70GL-P MirrorBit® Flash General Description The Cypress S70GL02GP .
Manufacture Cypress Semiconductor
Datasheet
Download S70GL02GP Datasheet




Cypress Semiconductor S70GL02GP
S70GL02GP
2 Gbit, 3V Page Mode
S70GL-P MirrorBit® Flash
General Description
The Cypress S70GL02GP 2 Gbit Mirrorbit Flash device is fabricated on 90-nm process technology. This device offers a fast page
access time of 25 ns with a corresponding random access time of 110 ns. It features a Write Buffer that allows a maximum of 32
words/64 bytes to be programmed in one operation, resulting in faster effective programming time than standard single byte/word
programming algorithms. This makes the device an ideal product for today’s embedded applications that require higher density,
better performance and lower power consumption.
This document contains information for the S70GL02GP device, which is a dual die stack of two S29GL01GP die. For detailed
specifications, refer to the discrete die datasheet provided in Table 1.
Table 1. Affected Documents/Related Documents
Title
S29GL01GP, S29GL512P, S29GL256P, S29GL128P
1 Gbit, 512, 256, 128 Mbit, 3 V, Page Flash with 90 nm MirrorBit
Process Technology
Publication Number
002-00886
Distinctive Characteristics
Two 1024 Mbit (S29GL01GP) in a single 64-ball Fortified-
BGA package (see S29GL01P datasheet for full
specifications)
Single 3V read/program/erase (3.0V - 3.6V)
90 nm MirrorBit process technology
8-word/16-byte page read buffer
32-word/64-byte write buffer reduces overall programming
time for multiple-word writes
Secured Silicon Sector region
– 128-word/256-byte sector for permanent, secure
identification through an 8-word/16-byte random Electronic
Serial Number
– Can be programmed and locked at the factory or by the
customer
Uniform 64Kword/128KByte Sector Architecture
– S70GL02GP: two thousand forty-eight sectors
100,000 erase cycles per sector typical
20-year data retention typical
Offered Packages
– 64-ball Fortified BGA
Suspend and Resume commands for Program and Erase
operations
Write operation status bits indicate program and erase
operation completion
Unlock Bypass Program command to reduce programming
time
Support for Common Flash Interface (CFI)
Persistent and Password methods of Advanced Sector
Protection
WP#/ACC input
– Accelerates programming time (when VACC is applied) for
greater throughput during system production
– Protects first or last sector of each die, regardless of sector
protection settings
Hardware reset input (RESET#) resets device
Ready/Busy# output (RY/BY#) detects program or erase
cycle completion
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-01338 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised March 16, 2016



Cypress Semiconductor S70GL02GP
Performance Characteristics
Max. Read Access Times (ns)(Note 1)
Parameter
2 Gb
Random Access Time (tACC)
Page Access Time (tPACC)
CE# Access Time (tCE)
OE# Access Time (tOE)
110
25
110
25
Notes
1. Access times are dependent on VCC and VIO operating ranges. See Ordering Information on page 4 for further details.
2. Contact a sales representative for availability.
Random Access Read
8-Word Page Read
Program/Erase
Standby
Current Consumption (typical values)
30 mA
1 mA
50 mA
2 µA
Program & Erase Times (typical values)
Single Word Programming
Effective Write Buffer Programming (VCC) Per Word
Effective Write Buffer Programming (VACC) Per Word
Sector Erase Time (64 Kword Sector)
60 µs
15 µs
15 µs
0.5 s
S70GL02GP
Document Number: 002-01338 Rev. *D
Page 2 of 11



Cypress Semiconductor S70GL02GP
S70GL02GP
Contents
1. Ordering Information ................................................... 4
1.1 Recommended Combinations........................................ 4
2. Input/Output Description and Logic Symbol............. 5
2.1 Special Handling Instructions for BGA Package............ 6
2.2 LSE064—64 ball Fortified Ball Grid Array, 13 ´ 11 mm . 7
3. Memory Map .................................................................. 8
4. Autoselect ..................................................................... 8
5. Erase And Programming Performance....................... 8
6. BGA Package Capacitance .......................................... 9
7. Revision History.......................................................... 10
Document Number: 002-01338 Rev. *D
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