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CY7C1354D

Part Number	CY7C1354D
Manufacturer	Cypress Semiconductor
Description	9-Mbit (256K x 36) Pipelined SRAM
Published	Mar 13, 2017
Detailed Description	CY7C1354D 9-Mbit (256K × 36) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K × 36) Pipelined SRAM with NoBL™ Archit...
Datasheet	CY7C1354D PDF File

Overview

CY7C1354D 9-Mbit (256K × 36) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K × 36) Pipelined SRAM with NoBL™ Architecture Features ■ Pin-compatible and functionally equivalent to ZBT ■ Supports 200 MHz bus operations with zero wait states ❐ Available speed grade is 200 MHz ■ Internally self-timed output buffer control to eliminate the need to use asynchronous OE ■ Fully registered (inputs and outputs) for pipelined operation ■ Byte write capability ■ Single 3.
3 V power supply (VDD) ■ 3.
3 V or 2.
5 V I/O power supply (VDDQ) ■ Fast clock-to-output times ❐ 3.
2 ns (for 200 MHz device) ■ Clock enable (CEN) pin to suspend operation ■ Synchronous self-timed writes ■ Available in non Pb-free 165...

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