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CY7C2262XV18
36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
Description
CY7C2262XV18/CY7C2264XV18 36-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 36-Mbit QDR® II+ Xtreme SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency) with ODT Features ■ Separate independent read and write data ports ❐ Supports concurrent transactions ■ 450 MHz clock for high bandwidth ■ 2-word burst for redu...
Cypress Semiconductor
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CY7C2262XV18
36-Mbit QDR II+ Xtreme SRAM Two-Word Burst Architecture
- Cypress Semiconductor
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