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Static RAM. CY7C10612GE Datasheet

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Static RAM. CY7C10612GE Datasheet






CY7C10612GE RAM. Datasheet pdf. Equivalent




CY7C10612GE RAM. Datasheet pdf. Equivalent





Part

CY7C10612GE

Description

16-Mbit (1M x 16) Static RAM



Feature


CY7C10612G CY7C10612GE 16-Mbit (1M × 16 ) Static RAM 16-Mbit (1M × 16) Static RAM Features ■ High speed ❐ tAA = 10 ns ■ Embedded error-correcting cod e (ECC) for single-bit error correction ■ Low active power ❐ ICC = 90 mA t ypical ■ Low CMOS standby power ❐ I SB2 = 20 mA typical ■ Operating volta ges of 3.3 ± 0.3 V ■ 1.0 V data rete ntion ■ Transistor-transistor logic (TT.
Manufacture

Cypress Semiconductor

Datasheet
Download CY7C10612GE Datasheet


Cypress Semiconductor CY7C10612GE

CY7C10612GE; L) compatible inputs and outputs ■ ERR pin to indicate 1-bit error detection and correction ■ Available in Pb-free 54-pin TSOP II package Functional Des cription The CY7C10612G and CY7C10612GE are high performance CMOS fast static RAM devices with embedded ECC. These de vices are offered in single chip enable option. The CY7C10612GE device include s an error indication .


Cypress Semiconductor CY7C10612GE

pin that signals an error-detection and correction event during a read cycle. T o write to the device, take Chip Enable s (CE) and Write Enable (WE) input LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7 .


Cypress Semiconductor CY7C10612GE

.

Part

CY7C10612GE

Description

16-Mbit (1M x 16) Static RAM



Feature


CY7C10612G CY7C10612GE 16-Mbit (1M × 16 ) Static RAM 16-Mbit (1M × 16) Static RAM Features ■ High speed ❐ tAA = 10 ns ■ Embedded error-correcting cod e (ECC) for single-bit error correction ■ Low active power ❐ ICC = 90 mA t ypical ■ Low CMOS standby power ❐ I SB2 = 20 mA typical ■ Operating volta ges of 3.3 ± 0.3 V ■ 1.0 V data rete ntion ■ Transistor-transistor logic (TT.
Manufacture

Cypress Semiconductor

Datasheet
Download CY7C10612GE Datasheet




 CY7C10612GE
CY7C10612G
CY7C10612GE
16-Mbit (1M × 16) Static RAM
16-Mbit (1M × 16) Static RAM
Features
High speed
tAA = 10 ns
Embedded error-correcting code (ECC) for single-bit error
correction
Low active power
ICC = 90 mA typical
Low CMOS standby power
ISB2 = 20 mA typical
Operating voltages of 3.3 ± 0.3 V
1.0 V data retention
Transistor-transistor logic (TTL) compatible inputs and outputs
ERR pin to indicate 1-bit error detection and correction
Available in Pb-free 54-pin TSOP II package
Functional Description
The CY7C10612G and CY7C10612GE are high performance
CMOS fast static RAM devices with embedded ECC. These
devices are offered in single chip enable option. The
CY7C10612GE device includes an error indication pin that
signals an error-detection and correction event during a read
cycle.
To write to the device, take Chip Enables (CE) and Write Enable
(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7), is written into the location
specified on the address pins (A0 through A19). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A19).
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See Truth Table on page 14 for a
complete description of Read and Write modes.
The input or output pins (I/O0 through I/O15) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), the BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
On the CY7C10612GE devices the detection and correction of a
single-bit error in the accessed location is indicated by the
assertion of the ERR output (ERR = high). See the Truth Table
on page 14 for a complete description of read and write modes.
The CY7C10612G and CY7C10612GE are available in a 54-pin
TSOP II package.
For a complete list of related documentation, click here.
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Description
-10 Unit
10 ns
110 mA
30 mA
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-88702 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised September 15, 2016




 CY7C10612GE
Logic Block Diagram – CY7C10612G
INPUT BUFFER
A0
A1
A2
AA34
A5
1M x 16
ARRAY
A6
AAA978
COLUMN
DECODER
Logic Block Diagram – CY7C10612GE
CY7C10612G
CY7C10612GE
I/O0 – I/O7
I/O8 – I/O15
BHE
WE
CE
OE
BLE
Document Number: 001-88702 Rev. *E
Page 2 of 19




 CY7C10612GE
CY7C10612G
CY7C10612GE
Contents
Pin Configurations ........................................................... 4
Maximum Ratings ............................................................. 6
Operating Range ............................................................... 6
DC Electrical Characteristics .......................................... 6
Capacitance ...................................................................... 7
Thermal Resistance .......................................................... 7
AC Test Loads and Waveforms ....................................... 7
Data Retention Characteristics ....................................... 8
Data Retention Waveform ................................................ 8
AC Switching Characteristics ......................................... 9
Switching Waveforms .................................................... 10
Truth Table ...................................................................... 14
ERR Output – CY7C10612GE ........................................ 14
Ordering Information ...................................................... 15
Ordering Code Definitions ......................................... 15
Package Diagrams .......................................................... 16
Acronyms ........................................................................ 17
Document Conventions ................................................. 17
Units of Measure ....................................................... 17
Document History Page ................................................. 18
Sales, Solutions, and Legal Information ...................... 19
Worldwide Sales and Design Support ....................... 19
Products .................................................................... 19
PSoC®Solutions ....................................................... 19
Cypress Developer Community ................................. 19
Technical Support ..................................................... 19
Document Number: 001-88702 Rev. *E
Page 3 of 19



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