FUJITSU SEMICONDUCTOR DATA SHEET
FLASH MEMORY
CMOS
8M (1M × 8) BIT
DS05-20850-2E
MBM29F080A-55/-70/-90
s FEATURES
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www.DataSheet4U.com
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Single 5.0 V read, write, and erase Minimizes system level power requirements Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection 48-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) 40-pin TSOP(I) (Package Suffix: PTN-Normal Bend Type, PTR-Reversed Bend Type) 44-pin SOP (Package Suffix: PF) Minimum 100,000 write/erase cycles High performance 55 ns maximum access time Sector erase architecture Uniform sectors of 64 K bytes each Any combination of sectors can be erased. Also supports full chip erase. Embedded Erase™ Algorithms Automatically pre-programs and erases the chip or any sector Embedded Program™ Algorithms Automatically programs and verifies data at specified addres.