Dual Transceivers. ARX4810FP Datasheet

ARX4810FP Transceivers. Datasheet pdf. Equivalent

Part ARX4810FP
Description Universal Dual Transceivers
Feature ARX4810 & 4810FP Universal Dual Transceivers for MIL-STD-1553 & MACAIR A3818, A5690, A5232 & A4905 .
Manufacture Aeroflex Circuit Technology
Datasheet
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ARX4810 & 4810FP Universal Dual Transceivers for MIL-STD-155 ARX4810FP Datasheet
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ARX4810FP
ARX4810 & 4810FP Universal Dual
Transceivers for MIL-STD-1553
& MACAIR A3818, A5690, A5232 & A4905
Features
• World’s smallest dual "Universal Transceiver"
0.3" X 1.2" Package
• Dual transceiver meets military data bus
requirements, MIL-STD-1553 and Macair specs
• Low power dissipation at full output power
• +5 / -15 Volt Power Supply Operation
• Voltage source output for higher bus drive power
• Monolithic construction using linear ASICs
• Processed and screened to MIL-STD-883 specs
• MIL-PRF-38534 Compliant Devices Available
• DESC SMD (Standard Military Drawing)
A EARRUOXSFA4L-88E81X3079
ARX4810 Dual Universal Transceiver
TX DATA IN
TX DATA IN
TX INHIBIT
+5 V
-15 V to -12V
GROUND
DRIVER
INPUT
AMP
SHAPING
REFERENCE
ACTIVE
FILTER
OUTPUT
STAG E
TX/RX
TX/RX
CO MP.
RX DATA OUT
CO MP.
RX DATA OUT
STROBE
Block Diagram (without transformer), 1/2 of unit shown
CIRCUIT TECHNOLOGY
www.aeroflex.com
General Description
The Aeroflex Circuit Technology
Models ARX4810 and ARX4810FP
are new generation monolithic
transceivers which provide full
compliance with MIL-STD-1553 and
Macair data bus requirements in the
smallest packages with low power
consumption and two power supply
operation.
The dual channel Model ARX4810
and Model ARX4810FP perform the
front-end analog function of inputting
and outputting data through a
transformer to a MIL-STD-1553 or
Macair data bus.
Design of these transceivers reflects
particular attention to active filter
performance.This results in low bit
and word error rate with superior
waveform purity and minimal zero
crossover distortion. Efficient
transmitter electrical and thermal
design provides low internal power
dissipation and heat rise at high as
well as low duty cycles.
Each channel of the dual transceiver
is completely separate from the other
and fully independent. This includes
power leads as well as signal lines.
Hence, each channel may be
connected to a different data bus with
no interaction.
Transmitter
The Transmitter section accepts
bi-phase TTL data at the input and
when coupled to the data bus with a
1:1 transformer, isolated on the data
bus side with two 52.5 Ohm fault
isolation resistors, and loaded by two
eroflex Circuit Technology – Data Bus Modules For The Future © SCD4810 REV B 8/12/98



ARX4810FP
70 Ohm terminations plus additional
receivers, the data bus signal
produced is 7.5 volts nominal P-P at
A-A’. (See Figure 5) When both
DATA and DATA inputs are held low
or high, the transmitter output
becomes a high impedance and is
“removed” from the line. In addition,
an overriding “INHIBIT input
provides for the removal of the
transmitter output from the line. A
logic “1” applied to the “INHIBIT”
takes priority over the condition of
the data inputs and disables the
transmitter. (See Transmitter Logic
Waveform, Figure 1.)
The transceiver utilizes an active
filter to suppress harmonics above
1 MHz to meet Macair specifications
A-3818, A-4905, A-5232 and
A-5690. The Transmitter may be
safely operated at 100% duty
cyclefor an indefinite period into a
short circuited, the 1553 or Macair
bus.
Receiver
The Receiver section accepts
bi-phase differential data at the input
and produces two TTL signals at the
output. The outputs are DATA and
DATA, and represent positive and
negative excursions of the input
beyond a pre-determined
threshold.(See Receiver Logic
Waveform Figure 2).
The pre-set internal thresholds will
detect data bus signals exceeding
1.150 Volts P-P and reject signals
less than 0.6 volts P-P when used
with a 1:1 turns ratio transformer.
(See Figure 5 for transformer data
and typical connection.)
Figure 1 Transmitter Logic Waveforms
DATA IN
DATA IN
INHIBIT
LINE TO LINE
OUTPUT
NOTES:
1. DATA and DATA inputs must be complementary waveforms or 50% duty cycle average, with no delays between them.
2. DATA and DATA must be in the same state during off time (both high or low).
Figure 2 Receiver Logic Waveforms
LINE TO LINE
INPUT
DATA OUT
DATA OUT
Note overlap
NOTE: Waveforms shown are for normally low devices. For normally high receiver output
,level devices,the receiver outputs are swapped as shown by the dashed lines.
Aeroflex Circuit Technology
2 SCD4810 REV B 8/12/98 Plainview NY (516) 694-6700





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