Voltage Regulator. LP3985 Datasheet

LP3985 Regulator. Datasheet pdf. Equivalent

Part LP3985
Description 150mA Low-Noise Ultra Low-Dropout CMOS Voltage Regulator
Feature LP3985 Micropower, 150mA Low-Noise Ultra Low-Dropout CMOS Voltage Regulator June 2003 LP3985 Micr.
Manufacture National Semiconductor
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June 2003
Micropower, 150mA Low-Noise Ultra Low-Dropout CMOS
Voltage Regulator
General Description
The LP3985 is designed for portable and wireless applica-
tions with demanding performance and space requirements.
The LP3985 is stable with a small 1µF ±30% ceramic or
high-quality tantalum output capacitor. The micro SMD re-
quires the smallest possible PC board area - the total appli-
cation circuit area can be less than 2.0mm x 2.5mm, a
fraction of a 1206 case size.
The LP3985’s performance is optimized for battery powered
systems to deliver ultra low noise, extremely low dropout
voltage and low quiescent current. Regulator ground current
increases only slightly in dropout, further prolonging the
battery life.
An optional external bypass capacitor reduces the output
noise without slowing down the load transient response.
Fast start-up time is achieved by utilizing an internal
power-on circuit that actively pre-charges the bypass capaci-
Power supply rejection is better than 50 dB at low frequen-
cies and starts to roll off at 1kHz. High power supply rejection
is maintained down to low input voltage levels common to
battery operated circuits.
The device is ideal for mobile phone and similar battery
powered wireless applications. It provides up to 150 mA,
from a 2.5V to 6V input. The LP3985 consumes less than
1.5µA in disable mode and has fast turn-on time less than
The LP3985 is available in a 5 bump small bump micro SMD,
a 5 bump large bump micro SMD, a 5 bump thin micro SMD
and a 5 pin SOT-23 package. Performance is specified for
−40˚C to +125˚C temperature range and is available in 2.5V,
2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V. 3.1V, 3.2V, 3.3V, 4.7V,
4.8V and 5.0V output voltages. For other output voltage
options between 2.5V to 5.0V or for a dual LP3985, please
contact National Semiconductor sales office.
Key Specifications
n 2.5 to 6.0V input range
n 150mA guaranteed output
n 50dB PSRR at 1kHz @ VIN = VOUT + 0.2V
n 1.5µA quiescent current when shut down
n Fast Turn-On time: 200 µs (typ.)
n 100mV maximum dropout with 150mA load
n 30µVrms output noise (typ) over 10Hz to 100kHz
n −40 to +125˚C junction temperature range for operation
n 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.1V, 3.2V,
3.3V, 4.7V, 4.8V and 5.0V outputs standard
n Miniature 5-I/O micro SMD and SOT-23-5 package
n Logic controlled enable
n Stable with ceramic and high quality tantalum capacitors
n Fast turn-on
n Thermal shutdown and short-circuit current limit
n CDMA cellular handsets
n Wideband CDMA cellular handsets
n GSM cellular handsets
n Portable information appliances
Typical Application Circuit
Note: Pin Numbers in parenthesis indicate micro SMD package.
* Optional Noise Reduction Capacitor.
© 2003 National Semiconductor Corporation DS101364

Block Diagram
Pin Description
* micro SMD
VEN A1 3 Enable Input Logic, Enable High
GND B2 2 Common Ground
5 Output Voltage of the LDO
1 Input Voltage of the LDO
4 Optional Bypass Capacitor for Noise
* The pin numbering scheme for the micro SMD package was revised in April 2002 to conform to JEDEC standard. Only the pin numbers were
revised. No changes to the physical location of the inputs/outputs were made. For reference purposes, the obsolete numbering scheme had VEN
as pin 1, GND as pin 2, VOUT as pin 3, VIN as pin 4, and BYPASS as pin 5.
Connection Diagrams
SOT 23-5 Package (MF)
5 Bump micro SMD Package (BPA05, BLA05, TLA05)
Top View
See NS Package Number MF05A
Top View
See NS Package Number BPA05, BLA05, TLA05

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