Power Supply. AN30183A Datasheet

AN30183A Supply. Datasheet pdf. Equivalent

Part AN30183A
Description 600mA Synchronous DC-DC Step Down Regulator / 300mA LDO Regulator Multi Power Supply
Feature AN30183A 600mA Synchronous DC-DC Step Down Regulator (1ch) 300mA LDO Regulator (4ch) Multi Power Sup.
Manufacture Panasonic
Datasheet
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AN30183A 600mA Synchronous DC-DC Step Down Regulator (1ch) 3 AN30183A Datasheet
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AN30183A
AN30183A
600mA Synchronous DC-DC Step Down Regulator (1ch)
300mA LDO Regulator (4ch)
Multi Power Supply (High Efficiency Power LSI)
FEATURES
z High-Speed Response DC-DC Step Down Regulator
Circuit that employs Hysteretic System
z DC-DC Step Down Regulator : 1-ch
Input voltage Range VBAT :2.5V to 5.5V
DVDD : 1.7V to 3.0V
Output voltage Range 0.8 V to 2.4 V
Up to 600 mA Output Current
z LDO Regulator : 4-ch
Input voltage Range VBAT :2.5V to 5.5V
DVDD : 1.7V to 3.0V
Output voltage Range 1.0 V to 3.3 V
Up to 300 mA Output Current
z I2C control (2-slave address selectable)
z 20 pin Wafer Level Chip Size Package (WLCSP)
(Size : 1.56 mm × 2.06 mm, 0.4 mm Pitch)
DESCRIPTION
AN30183A is a multi power supply LSI which has High-
Speed Response DC-DC Step Down Regulators (1-ch)
and LDO Regulators (4-ch).
By this DC-DC system, when load current charges
suddenly, it responds at high speed and minimizes the
changes of output voltage.
Since it is possible to use capacitors with small
capacitance and it is unnecessary to add external parts
for system phase compensation, this IC realizes
downsizing of set and reducing in the number of external
parts.
The output DC of each power supply is variable by I2C
control.
APPLICATIONS
Mobile phone, Portable appliance, etc
SIMPLIFIED APPLICATION
DVDD
0.1µF
DDVBAT1
VB VIN2
4.7µF
4.7µF 4.7µF
SDA
SCL
ASEL
REGCNT
DCDCOUT1
LX1
FB1
1µH
4.7µF
DDGND1
VLDO3
1µF
VLDO4
1µF
AN30183A
VLDO1
1µF
VLDO2
1µF
VREG REF RESETLDO1ON AGND
1µF 1µF
Notes) This application circuit is an example. The operation
of mass production set is not guaranteed. You should
perform enough evaluation and verification on the
design of mass production set. You are fully
responsible for the incorporation of the above
application circuit and information in the design of
your equipment.
Publication date: October 2012
1
EFFICIENCY CURVE
100
90
80
70
60
50
40
30
20
10
0
1
AN30183A DCDC1 Efficiency
Vout=0.8V
Vout=1.2V
Vout=1.8V
Vout=2.4V
10 100
Load Current [mA]
1000
Condition )
DDVBAT1 = DDVBAT2 = VB = VIN2 = 3.7V
Lo = 1.0 µH, Cout = 4.7 µF
Ver. AEB



AN30183A
AN30183A
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage
Output Current
Operating free-air temperature
Operating junction temperature
Storage temperature
Input Voltage Range
Output Voltage Range
ESD
Symbol
VB,VIN2,DDVBAT1
DVDD
IIN
Topr
Tj
Tstg
RESET,LDO1ON,FB1,
REGCNT
SCL,SDA,ASEL
LX1,VREG,REF,SDA
LDO1,LDO2,LDO3,LDO4
HBM (Human Body Model)
Rating
6.0
3.6
– 30 to + 85
– 30 to + 150
– 55 to + 150
– 0.3 to VVBAT + 0.3
– 0.3 to DVDD + 0.3
– 0.3 to VVBAT + 0.3
2
Unit Notes
V *1
V *1
A *1
°C *2
°C *2
°C *2
V
*1
*3
V
*1
*3
V
*1
*3
kV —
Notes) Do not apply external currents and voltages to any pin not specifically mentioned.
This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating.
This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated
recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product
may be affected.
*1:The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
*2:Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25 °C.
*3:VVBAT is voltage for DDVBAT1 = VB = VIN2, (VVBA + 0.3) V must not be exceeded 6 V.
VDVDD is voltage for DVDD, (VDVDD + 0.3) V must not be exceeded 3.6 V.
POWER DISSIPATION RATING
PACKAGE
20 pin Wafer level chip size Package
(WLCSP Type)
θJA
359.0 °C / W
PD ( Ta = 25 °C) PD ( Ta = 85 °C ) Notes
0.348 W
0.181 W
*1
Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply
voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not
exceed the allowable value.
*1:Glass Epoxy Substrate ( 4 Layers ) [ Glass-Epoxy: 50 X 50 X 0.8 t ( mm ) ]
Die Pad Exposed , Soldered.
CAUTION
Although this has limited built-in ESD protection circuit, but permanent damage may occur on it.
Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates
2 Ver. AEB





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