N-/P-channel MOSFET. FG694301 Datasheet

FG694301 MOSFET. Datasheet pdf. Equivalent


Part FG694301
Description Silicon N-/P-channel MOSFET
Feature This product complies with the RoHS Directive (EU 2002/95/EC). FG694301 Silicon N-channel MOS FET (.
Manufacture Panasonic
Datasheet
Download FG694301 Datasheet


This product complies with the RoHS Directive (EU 2002/95/EC FG694301 Datasheet
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FG694301
This product complies with the RoHS Directive (EU 2002/95/EC).
FG694301
Silicon N-channel MOS FET (FET1)
Silicon P-channel MOS FET (FET2)
For switching circuits
Overview
FG694301 is N-P channel dual type small signal MOS FET employed small
size surface mounting package.
Features
Low drain-source ON resistance:
RDS(on) typ. = 2 W (VGS = 4.0 V) / 4 W (VGS = –4.0 V)
High-speed switching
Small size surface mounting package: SSMini6-F3-B
Contributes to miniaturization of sets, reduction of component count.
Eco-friendly Halogen-free package
Packaging
Embossed type (Thermo-compression sealing): 8000 pcs / reel (standard)
Absolute Maximum Ratings Ta = 25°C
Parameter
Symbol
Drain-source surrender voltage
VDSS
FET1 Gate-source surrender voltage
VGSS
Drain current
ID
Peak drain current
IDP
Drain-source surrender voltage
VDSS
Gate-source surrender voltage
FET2
Drain current
VGSS
ID
Peak drain current
IDP
Total power dissipation
PT
Overall Channel temperature
Tch
Storage temperature
Tstg
Rating
30
±12
100
200
–30
±12
–100
–200
125
150
-55 to +150
Unit
V
V
mA
mA
V
V
mA
mA
mW
°C
°C
Package
Code
SSMini6-F3-B
Pin Name
1: Source (FET1)
2: Gate (FET1)
3: Drain (FET2)
4: Source (FET2)
5: Gate (FET2)
6: Drain (FET1)
Marking Symbol: V7
Internal Connection
(D1) (G2) (S2)
6 54
FET1
FET2
1 23
(S1) (G1) (D2)
Publication date: January 2011
Ver. AED
1



FG694301
FG694301
This product complies with the RoHS Directive (EU 2002/95/EC).
Electrical Characteristics Ta = 25°C±3°C
FET1
Parameter
Symbol
Conditions
Min Typ Max
Drain-source surrender voltage
VDSS ID = 1 mA, VGS = 0
30
Drain-source cutoff current
IDSS VDS = 30 V, VGS = 0
1.0
Gate-source cutoff current
IGSS VGS = ±10 V, VDS = 0
±10
Gate threshold voltage
VTH ID = 1.0 mA, VDS = 3.0 V
0.5 1.0 1.5
Drain-source ON resistance
RDS(on)
ID = 10 mA, VGS = 2.5 V
ID = 10 mA, VGS = 4.0 V
36
23
Forward transfer admittance
YfsID = 10 mA, VDS = 3.0 V
20 55
Short-circuit input capacitance (Common source) Ciss
12
Short-circuit output capacitance (Common source) Coss VDS = 3 V, VGS = 0, f = 1 MHz
7
Reverse transfer capacitance (Common source)
Crss
3
Turn-on time *
ton VDD = 3 V, VGS = 0 V to 3 V, ID = 10 mA
100
Turn-off time *
toff VDD = 3 V, VGS = 3 V to 0 V, ID = 10 mA
100
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.
2. *: Test circuit
VDD = 3 V
VGS = 0 V to 3 V
VIN
50
G
ID = 10 mA
RL = 300
D VOUT
VIN
VOUT
90%
10%
10%
90%
S
ton toff
FET2
Parameter
Symbol
Conditions
Min Typ Max
Drain-source surrender voltage
VDSS ID = -1 mA, VGS = 0
-30
Drain-source cutoff current
IDSS VDS = -30 V, VGS = 0
-1.0
Gate-source cutoff current
IGSS VGS = ±10 V, VDS = 0
±10
Gate threshold voltage
VTH ID = -1.0 mA, VDS = -3.0 V
- 0.5 -1.0 -1.5
Drain-source ON resistance
RDS(on)
ID = -10 mA, VGS = -2.5 V
ID = -10 mA, VGS = -4.0 V
7 17
47
Forward transfer admittance
YfsID = -10 mA, VDS = -3.0 V
20 40
Short-circuit input capacitance (Common source) Ciss
12
Short-circuit output capacitance (Common source) Coss VDS = -3 V, VGS = 0, f = 1 MHz
7
Reverse transfer capacitance (Common source)
Crss
3
Turn-on time *
ton VDD = -3V,VGS = 0Vto -3V, ID = -10 mA
100
Turn-off time *
toff VDD = -3V,VGS = -3Vto 0V, ID = -10 mA
100
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.
2. *: Test circuit
VGS = 0 V to 3 V
VIN
50
G
VDD = −3 V
ID = −10 mA
RL = 300
D VOUT
10%
VIN
VOUT 10%
90%
90%
S
td(on) tr
td(off) tf
Unit
V
mA
mA
V
W
mS
pF
pF
pF
ns
ns
Unit
V
mA
mA
V
W
mS
pF
pF
pF
ns
ns
2 Ver. AED







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